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PCF84C21AP 数据表(PDF) 11 Page - NXP Semiconductors |
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PCF84C21AP 数据表(HTML) 11 Page - NXP Semiconductors |
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11 / 20 page ![]() 1996 Nov 20 11 Philips Semiconductors Product specification Telecom microcontrollers PCF84C21A; PCF84C41A; PCF84C81A 12 AC CHARACTERISTICS VDD = 2.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C; all voltages with respect to VSS; unless otherwise specified. Table 2 I2C-bus timing (see Figs 15 and 16) Notes 1. DF stands for Division Factor: the divisor of fxtal (see the “PCF84CxxxA family” data sheet). 2. Values given for ASC = 0; for ASC = 1: tHIGH =; tLOW = 3. Determined by I2C-bus capacitance (Cb) and external pull-up resistor. 4. At maximum allowed I2C-bus capacitance Cb = 400 pF. 5. Determined by program. 6. If tLOW <, tSU:DAT ≥ , independent of ASC. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT tr rise time all outputs VDD = 5 V; Tamb =25 °C; CL =50pF − 30 − ns tf fall time all outputs VDD = 5 V; Tamb =25 °C; CL =50pF − 30 − ns fxtal clock frequency see Fig.3 1 − 16 MHz SYMBOL PARAMETER INPUT (see Fig.14) OUTPUT (see Fig.15; note 1) SCLK tHD;STA START condition hold time tLOW SCLK LOW time ; note 2 tHIGH SCLK HIGH time ; note 2 tRC SCLK rise time ≤1 µs ≤1 µs; note 3 tFC SCLK fall time ≤0.3 µs ≤0.1 µs; note 4 SDA tBUF bus free time ≥ 4.7 µs; note 5 tSU;DAT data set-up time ≥ 250 ns ; note 6 tHD;DAT data hold time ≥ 0 tRD SDA/P2.3 rise time ≤1 µs ≤1 µs; note 3 tFD SDA/P2.3 fall time ≤0.3 µs ≤0.1 µs; note 4 tSU;STO STOP condition set-up time 14 f xtal -------- ≥ DF 9 + 2f xtal × ------------------ 17 f xtal -------- ≥ DF 3 – 2f xtal × ------------------ 17 f xtal -------- ≥ DF 3 + 2f xtal × ------------------ 14 f xtal -------- ≥ 15 f xtal -------- ≥ 9 f xtal -------- ≥ 14 f xtal -------- ≥ DF 3 – 2f xtal × ------------------ 3DF 1 + () 4f xtal × ---------------------------- DF 3 – 4f xtal × ------------------ 24 f xtal -------- t LOW 9 – f xtal --------------------- |
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