1996 Nov 20

12

Philips Semiconductors

Product specification

Telecom microcontrollers

PCF84C21A; PCF84C41A;

PCF84C81A

Fig.15 Slave SCLK receiver SDA/P2.3 timing (SCLK and SDA/P2.3 are inputs).

MBB568

0.7 V DD

0.3 VDD

0.7 V DD

0.3 VDD

t SU;STO

t FD

t FC

t LOW

t HD;DAT

t SU;DAT

t RC

t RD

HIGH

t

t HD;STA

t BUF

SCLK

SDA/P2.3

Fig.16 Master SCLK and transmitter SDA/P2,3 timing (SCLK and SDA/P2.3 are outputs).

MBB569

t SU;STO

t FC

t LOW

t HD;DAT

t SU;DAT

HIGH

t

t HD;STA

SCLK

SDA/P2.3

t FD

acknowledge bit

t HD;DAT

t HD;DAT

0.9 VDD

VOLmax

0.9 V DD

VOLmax

t SU;DAT