PCF8563P datasheet(6/30 Pages) PHILIPS

6 / 30 page

Philips Semiconductors

PCF8563

Real-time clock/calendar

Product speciﬁcation

16 April 1999

6 of 30

9397 750 04855

[1]

Not coded in BCD.

8.6.1

Control/Status 1 register

Table 5:

BCD formatted registers overview

Bit positions labelled as ‘

−’are not implemented.

Address Register name BCD format tens nibble

BCD format units nibble

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

02H

Seconds

03H

Minutes

−

04H

Hours

−−

05H

Days

−−

06H

Weekdays

−−−−−

<weekdays 0 to 6 > [1]

07H

Months/Century

−−

08H

Years

09H

Minute alarm

0AH

Hour alarm

−

0BH

Day alarm

−

0CH

Weekday alarm

−−−−

<weekday alarm 0 to 6 > [1]

Table 6:

Control/Status 1 register bits description (address 00H)

Bit

Symbol Description

TEST1

TEST1 = 0; normal mode.

TEST1 = 1; EXT_CLK test mode; see Section 8.7.

STOP

STOP = 0; RTC source clock runs.

STOP = 1; all RTC divider chain ﬂip-ﬂops are asynchronously set

to logic 0; the RTC clock is stopped (CLKOUT at 32.768 kHz is still

available).

TESTC

TESTC = 0; power-on reset override facility is disabled (set to logic 0

for normal operation).

TESTC = 1; power-on reset override is enabled.

6, 4, 2 to 0 0

By default set to logic 0.

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