PCF8563P datasheet(7/30 Pages) PHILIPS

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Philips Semiconductors

PCF8563

Real-time clock/calendar

Product speciﬁcation

16 April 1999

7 of 30

9397 750 04855

8.6.2

Control/Status 2 register

[1]

TF and INT become active simultaneously.

[2]

n = loaded countdown timer value. Timer stopped when n = 0.

Table 7:

Description of Control/Status 2 register bits description (address 01H)

Bit

Symbol Description

7 to 5

By default set to logic 0.

TI/TP

TI/TP = 0: INT is active when TF is active (subject to the status of TIE).

TI/TP = 1: INT pulses active according to Table 8 (subject to the status

of TIE). Note that if AF and AIE are active then INT will be permanently

active.

When an alarm occurs, AF is set to logic 1. Similarly, at the end of a

timer countdown, TF is set to logic 1. These bits maintain their value

until overwritten by software. If both timer and alarm interrupts are

required in the application, the source of the interrupt can be

determined by reading these bits. To prevent one ﬂag being

overwritten while clearing another, a logic AND is performed during a

write access. See Table 9 for the value descriptions of bits AF and TF.

2TF

AIE

Bits AIE and TIE activate or deactivate the generation of an interrupt

when AF or TF is asserted, respectively. The interrupt is the logical OR

of these two conditions when both AIE and TIE are set.

AIE = 0: alarm interrupt disabled; AIE = 1: alarm interrupt enabled.

TIE = 0: timer interrupt disabled; TIE = 1: timer interrupt enabled.

TIE

Table 8:

INT operation (bit TI/TP = 1)

Source clock (Hz)

INT [1] period (s)

n [2] =1

n>1

4 096

⁄8192

⁄4096

⁄128

⁄64

⁄60

⁄64

Table 9:

Value descriptions for bits AF and TF

R/W

Bit: AF

Bit: TF

Value Description

Read

alarm ﬂag inactive

timer ﬂag inactive

alarm ﬂag active

timer ﬂag active

Write

alarm ﬂag is cleared

timer ﬂag is cleared

alarm ﬂag remains unchanged

timer ﬂag remains unchanged

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