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MIMXRT685SFVKB 数据表(PDF) 6 Page - NXP Semiconductors

部件名 MIMXRT685SFVKB
功能描述  Dual-core microcontroller with 32-bit Cortex®-M33 and Xtensa HiFi4 Audio DSP CPUs; Up to 4.5 MB SRAM; FlexSPI with cache and dynamic decryption; High-speed USB device/host Phy; 12-bit 1 Msamples/s ADC; Analog Comparator; Audio
PDF  171 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MIMXRT685SFVKB 数据表(HTML) 6 Page - NXP Semiconductors

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RT600
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors B.V. 2024. All rights reserved.
Product data sheet
Rev. 2.2 — 25 January 2024
6 of 173
NXP Semiconductors
RT600
Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4
Audio DSP CPUs
Main power supply is 1.8 V +/- 5%.
Analog supply is 1.71 V - 3.6 V.
Triple VDDIO supplies (can be shared or independent): 1.71 V - 3.6 V.
USB Supply: 3.0 V - 3.6 V.
Reduced power modes:
- Sleep mode: Clock shut down for each CPU independently.
- Deep-sleep mode: User selectable configuration via PDSLEEPCFG.
- Deep power-down mode: Power removed from the entire chip except in the
always-on domain.
- Full deep power-down mode: same as deep power-down mode, but external
power can be removed (except for VDD_AO18).
- Each individual SRAM partition can be independently powered-off or put into a
low-power retain mode. Individual SRAMs can also have their clocks stopped when
not actually in use in order to save power.
- Ability to operate the synchronous serial interfaces in sleep or deep-sleep mode
as a slave or USART clocked by the 32 kHz RTC oscillator.
- Wake-up from low-power modes via interrupts from various peripherals including
the RTC and the OS/Event timer.
RBB/FBB to provide additional control over power/performance trade-offs.
Power-On Reset (POR).
Operating temperature range -20 °C to +85 °C
Available in VFBGA176, WLCSP114, and FOWLP249 packages.



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