MIMXRT685SFVKB datasheet(95/171 Pages) NXP

95 / 171 page

RT600

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Product data sheet

Rev. 2.2 — 25 January 2024

95 of 173

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

[1] Typical ratings are not guaranteed. The values listed are for room temperature (25 C), nominal supply voltages.

[2] VDD_BIAS must be equal to ADC input voltage or max comparator input voltage.

[3] For SDK version 2.8 and before (SDK Power Library version = 0x020200): The maximum frequency for the specified VDDCORE

voltage is the frequency of the main clock. This is before the CPU CLOCK Divider. The VDDCORE voltage has to be set according to

the chosen main clock frequency. For SDK version 2.8.3 and after (SDK Power Library version = 0x02030): The maximum frequency for

the specified VDDCORE voltage is the frequency of the clock after CPU CLOCK and DSP clock Divider. The VDDCORE voltage has to

be set according to the chosen M33 CPU and DSP CPU clock frequency. Please see Figure 6 “RT600 clock generation”.

[4] 1.8 V supply voltage for OTP during active mode. In deep-sleep mode, this pin can be powered off to conserve additional current (~ 65

uA). VDD1V8_1 must be stable before performing any OTP related functions.

[5] When LDO_ENABLE is externally tied low, the user must boot at VDDCORE = 1.0 V or higher (Low power/Normal clock mode - OTP

setting - BOOT_CLK_SPEED) or VDDCORE = 1.13 V (High Speed clock - OTP setting - BOOT_CLK_SPEED). Thereafter, the

VDDCORE can be adjusted to the desired level.

[6] When LDO_ENABLE is externally tied high, the on-chip regulator to the VDDCORE Core voltage in PMC is set to the default value 1.05

V (Low power/Normal clock mode - OTP setting - BOOT_CLK_SPEED) or 1.13 V (High Speed clock - OTP setting -

BOOT_CLK_SPEED). Thereafter, the POWER_SetLdoVoltageForFreq API function can be used to internally configure the on-chip

regulator voltage to the VDDCORE.

[7] When performing any OTP read/write function, the VDDCORE voltage must be set to 1.0 V or higher when LDO_ENABLE is externally

tied high or low.

[8] Low voltage operating range is for applications using the RT600 at VDDCORE voltages between 0.7 V to 0.9 V. So for example, if an

application is using VDDCORE = 0.7 V and 0.9 V, max frequencies defined for the low voltage operating range must be used. Full

voltage operating range is for applications using the RT600 at VDDCORE voltages between 0.7 V to 1.13 V. So for example, if an

application is using VDDCORE = 0.7 V and 1.13 V, max frequencies defined for the full voltage operating range must be used. Low

voltage range provides higher operating speeds when compared to full voltage operating range. After Boot-up, the application must

select either low voltage range or full voltage range. An application cannot switch between low voltage range and full voltage range

mode.

VDDCORE [3]

Low voltage operating range.

SDK Power Library version = 0x020300,

SDK version 2.8.3 and later. [8]

Active Mode

(DSP Max Freq = 95 MHz, FBB).

0.7

1.155 V

Active Mode

(DSP Max Freq = 235 MHz, FBB).

0.8

1.155 V

Active Mode

(DSP Max Freq = 355 MHz, FBB).

0.9

1.155 V

Full voltage operating range.

SDK Power Library version = 0x020300,

SDK version 2.8.3 and later. [8]

Active Mode

(DSP Max Freq = 55 MHz, FBB).

0.7

1.155 V

Active Mode

(DSP Max Freq = 170 MHz, FBB).

0.8

1.155 V

Active Mode

(DSP Max Freq = 285 MHz, FBB).

0.9

1.155 V

Active Mode

(DSP Max Freq = 440 MHz, FBB).

1.0

1.155 V

Active Mode

(DSP Max Freq = 550 MHz, FBB).

1.13 -

1.155 V

VDDIO_0/1/2

Supply voltage for GPIO rail.

1.71 -

3.6

VDDA_ADC1V8 1.8 V analog supply voltage for ADC and

comparator.

1.71 -

1.89

VDDA_BIAS [2] Bias for ADC and comparator.

1.71 -

3.6

VREFP

ADC positive reference voltage.

1.71 -

1.89

USB1_VDD3V3 USB1 analog 3.3 V supply.

3.0

3.6

Table 21. General operating conditions …continued

Tamb = -20 C to +85 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min Typ[1] Max

Unit

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