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Mira130

Typical Application Circuit

Datasheet

• PUBLIC

DS000715

• v6-00 • 2023-Aug-09

51

│ 15

c) Reference layer: There must be a reference layer below the MIPI differential pairs (a ground plane is recommended).

The continuity of the layer must be guaranteed, that is the layer below the MIPI differential pairs cannot be fragmented,

cannot consist of gaps, and cannot be cut by other lines. A whole layer of ground is preferred. If not possible, the

minimum requirement is to ensure that the reference layer below the MIPI differential pairs is 4 W wider than each side

of the MIPI signal wire, where W is the width of MIPI differential pairs.

d) Equal length: The difference in length between the two wires of a MIPI differential pair should be limited to 10 mils,

and the difference in length among MIPI differential pairs should be controlled within 100 mils. These requirements

ensure that the differential signals can reach the receiving end at the same time. When implementing the requirement of

equal length, the symmetry should be considered. The distance between meander wires should be 4 times the trace

width to avoid being too dense. The wires should be wound near the bonding pad as much as possible to keep equal

length, and the wire width and distance cannot be changed arbitrarily.

e) Symmetry: MIPI differential pairs should be kept equal length and distance. The purpose of symmetry is to ensure the

consistency of trace impedance in order to reduce reflection. Poor symmetry may result in signal distortion, instability or

no image.

f) Keep clear of interference: The clearance between MIPI differential pairs should be larger than 2 W. The clearance

between MIPI differential pairs and other high-speed signals (parallel data lines, clock lines, etc.) should be larger than

3 W, and they should not be routed in parallel. A larger clearance should be considered to avoid interference generated

from circuits such as switching power supplies.

g) Through holes: Through holes should be avoided for MIPI differential pairs. If unavoidable, through holes should be

on both wires of the differential pair in order to maintain symmetry. If a differential pair is routed to another layer by

means of through holes, the reference layer should also follow by means of through holes near the through holes of the

differential pair.

For the PLCC package with less pins the recommended application circuit is in Figure 11:

Application Circuit for PLCC Package.

Figure 11:

Application Circuit for PLCC Package