MPC8323CVRADDC datasheet(25/80 Pages) FREESCALE

25 / 80 page

MPC8323E PowerQUICC™ II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0

Freescale Semiconductor

Local Bus

Figure 13 shows the MII management AC timing diagram.

Figure 13. MII Management Interface Timing Diagram

Local Bus

This section describes the DC and AC electrical specifications for the local bus interface of the

MPC8323E.

9.1

Local Bus DC Electrical Characteristics

Table 29 provides the DC electrical characteristics for the local bus interface.

9.2

Local Bus AC Electrical Specifications

Table 30 describes the general timing parameters of the local bus interface of the MPC8323E.

Table 29. Local Bus DC Electrical Characteristics

Parameter

Symbol

Min

Max

Unit

High-level input voltage

VIH

2OVDD + 0.3

Low-level input voltage

VIL

–0.3

0.8

High-level output voltage, IOH = –100 μAVOH

OVDD – 0.2

—

Low-level output voltage, IOL = 100 μAVOL

—0.2

Input current

IIN

—±5

μA

Table 30. Local Bus General Timing Parameters

Parameter

Symbol1

Min

Max

Unit

Notes

Local bus cycle time

tLBK

—

Input setup to local bus clock

tLBIVKH

7—

3, 4

Input hold from local bus clock

tLBIXKH

1.0

—

3, 4

LALE output fall to LAD output transition (LATCH hold time)

tLBOTOT1

1.5

—

MDC

tMDDXKH

tMDC

tMDCH

tMDCR

tMDCF

tMDDVKH

tMDKHDX

MDIO

(Input)

(Output)

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