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ADA4000-1ARZ-R7 数据表(PDF) 11 Page - Analog Devices

部件名 ADA4000-1ARZ-R7
功能描述  Low Cost, Precision JFET Input Operational Amplifiers
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4000-1ARZ-R7 数据表(HTML) 11 Page - Analog Devices

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ADA4000-1/ADA4000-2/ADA4000-4
Rev. 0 | Page 11 of 16
)
SETTLING TIME
Settling time is the amount of time it takes the amplifier output
to reach and remain within a percentage of its final value. This
is an important parameter in data acquisition systems. Because
most bipolar DAC converters have current output, an external
op amp is required to convert the current to voltage. Therefore,
the amplifier settling time plays a role in the total settling time
of the output signal. A good approximation for the total settling
time is
() (
2
2
AMP
t
DAC
t
Total
t
S
S
S
+
=
The ADA4000-1/ADA4000-2/ADA4000-4 settle to within 0.1%
of their final value in less than 1.2 μs. The settling time has been
tested by using the configuration circuit in Figure 34.
The input signal is a 10 V pulse and the output is the error
signal for the settling time shown in Figure 33.
200ns/DIV
200mV/DIV
5V/DIV
Figure 33. Settling Time Measurement Using the False Summing Node Method
ADA4000-1
V+
V–
+15V
–15V
10V p-p
3
2
1
10kΩ
10kΩ
10kΩ
AD828
V+
V–
+15V
–15V
20kΩ
VOUT
1kΩ
8
4
10kΩ
V1
0
Figure 34. Settling Time Test Circuit



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