SP5T PIN Diode Reflective Switch

MA4SW510

V 2.00

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or information contained herein without notice.

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5

Operation of the MA4SW510 Switch

The Simultaneous Application of Negative DC Current to the Low Loss Port and Positive DC current to the

Remaining Isolated Ports as shown in Figure 1 achieves operation of the MA4SW Series of PIN Diode Switches. The

Backside Area of the Die is the RF and DC Return Ground Plane. The DC Return is achieved on Common Port J1.

Constant Current Sources should supply the DC Control Currents. The diode voltages at these points will not exceed

+ 1.5 volts (1.2 volts typical) for Supply Currents up to + 50 mA. In the Low Loss State, the Series Diode must be

Forward Biased and the Shunt Diode Reverse Biased. For All the Isolated Ports, the Shunt Diode is Forward Biased

and the Series Diode is Reverse Biased. The Bias Network Design should yield > 30 dB RF to DC Isolation.

Best Insertion Loss, P1dB, IP3, and Switching Speed is Achieved by using a Voltage Pull-up Resistor in the DC

Return Path, ( J1 ). A Minimum Value of | -2V | is recommended at this Return Node, which is achievable with a

Standard , +/- 5 V TTL Controlled PIN Diode Driver. A Typical DC Bias Schematic for 2-18 GHz Operation is

shown in Figure 1.

Fig 1: 2—18 GHz Bias Network Schematic

HMIC Switch Die

100 Ohms

39 pF

22 nH

22 pF

39 pF

DC Bias

J1

22 nH

22 pF

J2

J3

J5

J6

J4