Specifications and information are subject to change without notice.

WJ Communications, Inc

x Phone 1-800-WJ1-4401 x FAX: 408-577-6621 x e-mail: sales@wj.com x Web site: www.wj.com

Page 6 of 7 April 2007

FH1

High Dynamic Range FET

Reference Design: 880 MHz, 18 dB Gain

Frequency

GHz

850

875

900

Gain

dB

17.95

17.96

18.00

S11

dB

-16

-15

-15

S22

dB

-23

-22

-22

P1dB

dBm

+22

OIP3

dBm

+41

Noise Figure

dB

1.8

1.83

1.85

Supply Voltage

V

+5

Supply Current

mA

140

0.7

0.8

0.9

1

Frequency (GHz)

Gain / Return Loss (dB)

14

15

16

17

18

19

-25

-20

-15

-10

-5

0

DB(|S(1,1)|) (R)

DB(|S(2,1)|) (L)

DB(|S(2,2)|) (R)

ID=C5

R=1e4 Ohm

ID=C4

C=1e4 pF

ID=C2

C=100 pF

ID=C1

C=100 pF

ID=R6

R=360 Ohm

ID=R7

R=360 Ohm

ID=C3

C=100 pF

ID=L1

L=33 nH

ID=C6

C=100 pF

ID=R1

L=10 nH

1

2

NET="FH1"

+5V

Notes:

1.

Circuit Board Material: .0

#´ÃBr‡rxÃHG!9TTà …Ã2Ã#!à “Ãp‚ƒƒr…ÃÃUurÀhvÃ€vp…‚†‡…vƒÃyvrÃuh†ÃhÃyvrÃv€ƒrqhprÂsÃ$à 

2.

Components not shown in the schematic are either not used or loaded with a thru. Gain for the circuit can be adjusted slightly with the modification of the feedback resistance.

Reference Design: 800 - 2200 MHz, 15 dB Gain

Frequency

GHz

900

1900

2140

Gain

dB

14.9

16.3

16.4

S11

dB

-22

-10

-18

S22

dB

-14

-9.7

-9.6

P1dB

dBm

+22.1

+22.4

+22.1

OIP3

dBm

+40.7

+42.0

+41.0

Noise Figure

dB

2.4

2.6

2.8

Supply Voltage

V

+5

Supply Current

mA

140

0.75

1

1.25

1.5

1.75

2

2.25

Frequency (GHz)

Gain / Return Loss

8

10

12

14

16

18

-30

-20

-10

0

10

20

DB(|S(1,1)|) (R)

DB(|S(2,1)|) (L)

DB(|S(2,2)|) (R)

C=2 pF

ID=C3

C=100 pF

ID=C5

L=6.8 nH

ID=L1

L=18 nH

ID=R1

L=2.7 nH

ID=C1

R=2.2 Ohm

TLINP

ID=TL1

Z0=50 Ohm

L=80 mil

Eeff=3.4

Loss=0

F0=0 GHz

ID=C2

C=100 pF

ID=C4

C=100 pF

ID=R6

R=240 Ohm

ID=R7

R=240 Ohm

ID=C6

C=100 pF

1

2

NET="FH1"

+5V

Notes:

1.

Circuit Board Material: .0

#´ÃBr‡rxÃHG!9TTà …Ã2Ã#!à “Ãp‚ƒƒr…ÃÃUurÀhvÃ€vp…‚†‡…vƒÃyvrÃuh†ÃhÃyvrÃv€ƒrqhprÂsÃ$à 

2.

Components not shown in the schematic are either not used or loaded with a thru. Gain for the circuit can be adjusted slightly with the modification of the feedback resistance.

3.

A dc blocking capacitor needs to be placed before C1 if dc is present at the input of the circuit.