the device temperature. To avoid this, the internal FET is operated in overvoltage clamp for a maximum duration

of tOVC(dly), 162 msec (typical). After this duration, the internal FET is turned OFF and the subsequent operation

of the device depends on the MODE configuration (auto-retry or latch off) setting as per the Table 9-1.

Figure 9-4 illustrates the overvoltage cut-off functionality and Figure 9-5 illustrates the overvoltage clamp

functionality. FLT is asserted after a delay of 617 µs (typical) after entering in overvoltage clamp mode and

remains asserted until the overvoltage fault is removed.

VIN

VOUT

FLTb

TPS16630

OVP Setting at 33 V

Figure 9-4. Overvoltage Cut-Off Response at 33-V

Level

VIN

FLTb

IIN

VOUT

TPS16632

COUT = 10 µF, FLT

connected to VOUT

RLOAD = 30 Ω

Figure 9-5. Overvoltage Clamp Response

9.3.4 Overload and Short Circuit Protection

The device monitors the load current by sensing the voltage across the internal sense resistor. The FET current

is monitored during start-up and normal operation.

9.3.4.1 Overload Protection

The TPS1663x devices feature accurate overload current limiting and fast short circuit protection feature. If

the load current exceeds the programmed current limit IOL, the device regulates the current through it at IOL

eventually reducing the output voltage. The power dissipation across the device during this operation is (VIN –

VOUT) × IOL and this can heat up the device and eventually enter into thermal shutdown. The maximum duration

for the overcurrent through the FET is tCL_PLIM(dly), 162 msec (typical). If the thermal shutdown occurs before this

time the internal FET turns OFF and the device operates either in auto-retry or latch off mode based on MODE

pin configuration in Table 9-1. Set the current limit using Equation 4.

OL

ILIM

18

I

R

(4)

where

• I(OL) is the overload current limit in Ampere

• R(ILIM) is the current limit resistor in kΩ

During the overload current limiting if the overload condition exists for more than tCL_PLIM_FLT(dly), 1.3 msec

(typical), the FLT asserts to warn of impending turnoff of the internal FETs due to the subsequent thermal

shutdown event or due to tCL_PLIM(dly) timer expiry. The FLT signal remains asserted until the fault condition is

removed and the device resumes normal operation. Figure 9-6 and Figure 9-7 illustrate overload current limiting

performance.

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TPS1663

SLVSET9F – SEPTEMBER 2018 – REVISED FEBRUARY 2023

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