TPS16632RGER datasheet(4/46 Pages) TI1

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Table 6-1. Pin Functions

TYPE#

unique_

13/

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13_Con

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0035D5

28-587

A-47C9

-A095-9

5416BF

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eferenc

eTitle

DESCRIPTION

NAME

TPS16630

TPS16632

VQFN

HTSSOP

VQFN

Power input. Connects to the DRAIN of the internal FET.

—

P_IN

Supply voltage of the device. Always connect P_IN to IN directly.

UVLO

Input for setting the programmable undervoltage lockout threshold.

An undervoltage event turns off the internal FET and asserts FLT to

indicate the power-failure.

OVP

—

Input for setting the adjustable overvoltage protection threshold (for

TPS16630 only). An overvoltage event turns off the internal FET and

asserts FLT to indicate the overvoltage fault.

PLIM

—

Input for setting the adjustable output power limiting threshold

(TPS16632 Only). Connect a resistor across PLIM to GND to set

the output power limit. Connect PLIM to GND if PLIM feature is not

used. See Output Power Limiting, PLIM (TPS16632 Only) section.

GND

—

Connect GND to system ground.

dVdT

I/O

A capacitor from this pin to GND sets output voltage slew rate.

Leaving this pin floating enables device power up in thermal

regulation resulting in fast output charge. See the Hot Pug-In and

In-Rush Current Control section.

ILIM

I/O

A resistor from this pin to GND sets the overload limit. See Overload

and Short Circuit Protection section.

MODE

Mode selection pin for Overload fault response. See the Device

Functional Modes section.

SHDN

Shutdown pin. Pulling SHDN low makes the device to enter into low

power shutdown mode. Cycling SHDN pin voltage resets the device

that has latched off due to a fault condition.

IMON

Analog current monitor output. This pin sources a scaled down ratio

of current through the internal FET. A resistor from this pin to GND

converts current to proportional voltage. If unused, leave it floating.

FLT

Fault event indicator. This pin is an open drain output. If unused,

leave floating or connect to GND.

PGOOD

Active High. A high indicates that the internal FET is enhanced.

PGOOD goes low when the internal FET is turned OFF during a fault

or when SHDN is pulled low. If PGOOD is unused, then connect to

GND or leave it floating.

OUT

Power output of the device.

—

TPS1663

SLVSET9F – SEPTEMBER 2018 – REVISED FEBRUARY 2023

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