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MPC862P 数据表(PDF) 61 Page - Freescale Semiconductor, Inc

部件名 MPC862P
功能描述  PowerQUICC??Family Hardware Specifications
PDF  88 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC862P 数据表(HTML) 61 Page - Freescale Semiconductor, Inc

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MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Freescale Semiconductor
61
CPM Electrical Characteristics
Figure 60. Ethernet Collision Timing Diagram
Figure 61. Ethernet Receive Timing Diagram
134
TENA inactive delay (from TCLK1 rising edge)
10
50
ns
135
RSTRT active delay (from TCLK1 falling edge)
10
50
ns
136
RSTRT inactive delay (from TCLK1 falling edge)
10
50
ns
137
REJECT width low
1
—
CLK
138
CLKO1 low to SDACK asserted 2
—20
ns
139
CLKO1 low to SDACK negated 2
—20
ns
1
The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 2/1.
2
SDACK is asserted whenever the SDMA writes the incoming frame DA into memory.
Table 22. Ethernet Timing (continued)
Num
Characteristic
All Frequencies
Unit
Min
Max
CLSN(CTS1)
120
(Input)
RCLK1
121
RxD1
(Input)
121
RENA(CD1)
(Input)
125
124
123
127
126
Last Bit



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