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MPC859TZP100A 数据表(PDF) 77 Page - Freescale Semiconductor, Inc |
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MPC859TZP100A 数据表(HTML) 77 Page - Freescale Semiconductor, Inc |
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77 / 96 page ![]() MPC866/MPC859 Hardware Specifications, Rev. 2 Freescale Semiconductor 77 FEC Electrical Characteristics Figure 77 shows the MII serial management channel timing diagram. Figure 77. MII Serial Management Channel Timing Diagram M13 MII_MDIO (input) to MII_MDC rising edge hold 0 — ns M14 MII_MDC pulse width high 40% 60% MII_MDC period M15 MII_MDC pulse width low 40% 60% MII_MDC period Table 36. MII Serial Management Channel Timing Num Characteristic Min Max Unit M11 MII_MDC (output) MII_MDIO (output) M12 M13 MII_MDIO (input) M10 M14 MM15 |
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