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MPC8248VRP 数据表(PDF) 6 Page - Freescale Semiconductor, Inc

部件名 MPC8248VRP
功能描述  PowerQUICC II??Family Hardware Specifications
PDF  60 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC8248VRP 数据表(HTML) 6 Page - Freescale Semiconductor, Inc

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MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 1.5
6
Freescale Semiconductor
Overview
– Ethernet/IEEE 802.3 CDMA/CS
– HDLC/SDLC and HDLC bus
– Universal asynchronous receiver transmitter (UART)
– Synchronous UART
– Binary synchronous (BiSync) communications
– Transparent
– QUICC multichannel controller (QMC) up to 64 channels
• Independent transmit and receive routing, frame synchronization.
• Serial-multiplexed (full-duplex) input/output 2048-, 1544-, and 1536-Kbps PCM highways
• Compatible with T1/DS1 24-channel and CEPT E1 32-channel PCM highway, ISDN basic rate,
ISDN primary rate, and user defined.
• Subchanneling on each time slot.
• Independent transmit and receive routing, frame synchronization and clocking
• Concatenation of any not necessarily consecutive time slots to channels independently for Rx/Tx
• Supports H1,H11, and H12 channels
• Allows dynamic allocation of channels
– SCC3 in NMSI mode is not usable when USB is enabled.
— Two serial management controllers (SMCs), identical to those of the MPC860
– Provides management for BRI devices as general-circuit interface (GCI) controllers in
time-division-multiplexed (TDM) channels
– Transparent
– UART (low-speed operation)
— One serial peripheral interface identical to the MPC860 SPI
— One I2C controller (identical to the MPC860 I2C controller)
– Microwire compatible
– Multiple-master, single-master, and slave modes
— Up to two TDM interfaces
– Supports one group of two TDM channels
– 1024 bytes of SI RAM
— Eight independent baud rate generators and 14 input clock pins for supplying clocks to FCC,
SCC, SMC, and USB serial channels
— Four independent 16-bit timers that can be interconnected as two 32-bit timers
PCI bridge
— PCI Specification revision 2.2-compliant and supports frequencies up to 66 MHz
— On-chip arbitration
— Support for PCI to 60x memory and 60x memory to PCI streaming
— PCI host bridge or peripheral capabilities
— Includes four DMA channels for the following transfers:
– PCI-to-60x to 60x-to-PCI



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