| 数据搜索系统,热门电子元器件搜索 |
|
MPC8280VRT 数据表(PDF) 31 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8280VRT 数据表(HTML) 31 Page - Freescale Semiconductor, Inc |
|
31 / 80 page ![]() MPC8280 PowerQUICC II™ Family Hardware Specifications, Rev. 1.7 Freescale Semiconductor 31 Clock Configuration Modes 1101_000 100.0 133.3 2.5 250.0 333.3 3 300.0 400.0 5 50.0 66.7 1101_001 100.0 133.3 2.5 250.0 333.3 3.5 350.0 466.6 5 50.0 66.7 1101_010 100.0 133.3 2.5 250.0 333.3 4 400.0 533.3 5 50.0 66.7 1101_011 100.0 133.3 2.5 250.0 333.3 4.5 450.0 599.9 5 50.0 66.7 1101_100 100.0 133.3 2.5 250.0 333.3 5 500.0 666.6 5 50.0 66.7 1101_101 125.0 166.7 2 250.0 333.3 3 375.0 500.0 5 50.0 66.7 1101_110 125.0 166.7 2 250.0 333.3 4 500.0 666.6 5 50.0 66.7 1110_000 100.0 133.3 3 300.0 400.0 3.5 350.0 466.6 6 50.0 66.7 1110_001 100.0 133.3 3 300.0 400.0 4 400.0 533.3 6 50.0 66.7 1110_010 100.0 133.3 3 300.0 400.0 4.5 450.0 599.9 6 50.0 66.7 1110_011 100.0 133.3 3 300.0 400.0 5 500.0 666.6 6 50.0 66.7 1110_100 100.0 133.3 3 300.0 400.0 5.5 550.0 733.3 6 50.0 66.7 1100_000 Reserved 1100_001 Reserved 1100_010 Reserved 1 The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum CPU frequency is 250 MHz; for RevA or later the minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz for extended temperature devices. 2 As Table 15 shows, PCI_MODCK determines the PCI clock frequency range. Refer to Table 18 for lower configurations. 3 MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins. 4 60x and local bus frequency. Identical to CLKIN. 5 CPM multiplication factor = CPM clock/bus clock 6 CPU multiplication factor = Core PLL multiplication factor Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=0) 1, 2 (continued) Mode 3 Bus Clock 4 (MHz) CPM Multiplication Factor 5 CPM Clock (MHz) CPU Multiplication Factor 6 CPU Clock (MHz) PCI Division Factor PCI Clock (MHz) MODCK_H- MODCK[1-3] Low High Low High Low High Low High |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |