MP7782DF datasheet(3/8 Pages) MPS

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MP7782 – 50W CLASS D MONO BRIDGED AUDIO AMPLIFIER

MP7782 Rev. 1.2

www.MonolithicPower.com

8/3/2005

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

OPERATING SPECIFICATIONS

(Circuit of Figure 1, VDD = 24V, VEN = 5V, TA = +25˚C, unless otherwise noted.)

Parameter

Condition

Min

Typ

Max

Units

Standby Current

VEN = 0V

700

µA

Quiescent Current

f = 1KHz, THD+N = 10%, RL = 6Ω

Power Output

f = 1KHz, THD+N = 10%, RL = 8Ω

POUT = 1W, f = 1KHz, RL = 6Ω

0.06

THD+ Noise

POUT = 1W, f = 1KHz, RL = 8Ω

0.08

Efficiency

f = 1KHz, POUT = 50W

Dynamic Range

100

Noise Floor

A-Weighted

187

µV

Power Supply Rejection

f = 1KHz

PIN FUNCTIONS

Pin #

Name

Description

1, 5, 11, 16

No Connect. Not internally connected.

3, 8

FB1

First Feedback. Receives feedback from SW1 via resistor(s) and the positive input

signal via resistor and capacitor. Both pins must be tied together.

2, 7

FB2

Second Feedback. Receives feedback from SW2 via resistor(s) and the negative

input signal via resistor and capacitor. Both pins must be tied together.

4, 9

AGND

Analog Ground. Both pins must be tied together.

6, 10

Enable Input. Drive high to enable the MP7782, drive low to disable it. Both pins

must be tied together.

BS2

High-Side MOSFET Bootstrap Input for Channel 2. A capacitor from BS2 to SW2

supplies the gate drive current to the internal high-side MOSFET. Connect a 1µF

capacitor from SW2 to BS2. See Figure 1.

VDD2

Power Supply Input. Bypass VDD2 to PGND2 with a 1µF X7R capacitor (in

addition to the main bulk capacitor), placed close to pins 13 and 15.

SW2

Switched Power Output. SW2 is the output of Channel 2. Connect the LC filter to

this pin. See Figure 1.

PGND2

Power Ground for Channel 2. Connect PGND2 to PGND1. See Figure 1.

BS1

High-Side MOSFET Bootstrap Input for Channel 1. A capacitor from BS1 to SW1

supplies the gate drive current to the internal high-side MOSFET. Connect a 1µF

capacitor from SW1 to BS1. See Figure 1.

VDD1

Power Supply Input. Bypass VDD1 to PGND1 with a 1µF X7R capacitor (in

addition to the main bulk capacitor), placed close to pins 18 and 20.

SW1

Switched Power Output. SW1 is the output of Channel 1. Connect the LC filter to

this pin. See Figure 1.

PGND1

Power Ground for Channel 1. Connect PGND1 to PGND2. See Figure 1.

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