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SP690TCP 数据表(PDF) 14 Page - Sipex Corporation |
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SP690TCP 数据表(HTML) 14 Page - Sipex Corporation |
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14 / 20 page ![]() SP690T/S/R JAN 30-06 SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory © 2006 Sipex Corporation 14 Switchover at V SW (2.40V) ensures that battery- backup mode is entered before V OUT gets too close to the 2.0V minimum required to reliably retain data in CMOS RAM. Switchover at higher V CC voltages would decrease backup-battery life. When V CC recovers, switchover is deferred until V CC rises above the reset threshold, VRST, to ensure a stable supply. V OUT is connected to V CC through a 1.5Ω PMOS power switch. Using a High Capacity Capacitor as a Backup Power Source Figure 21 shows two ways to use a High Value Capacitor as a backup power source. The High Value Capacitor may be connected through a diode to the 3V input as in Figure 21A or, if a 5V supply is also available, the High Value Capacitor may be charged up to the 5V supply as in Figure 21B allowing a longer backup period. Since V BATTERY can exceed VCC while VCC is above the reset threshold, there are no special precautions when using these µP supervisors with a High Value Capacitor. Operation Without a Backup Power Source These µP supervisors were designed for battery-backed applications. If a backup power source is not used, connect both VBATTERY and V OUT to VCC. Since there is no need to switch over to any backup power source, V OUT does not need to be switched. A direct connec- tion to V CC eliminates any voltage drops across the switch which may push V OUT below VCC. Replacing the Backup Battery If V BATTERY is decoupled with a 0.1µF capacitor to ground, the backup battery can be removed while V CC remains valid without danger of triggering RESET/RESET. As long as V CC stays above V SW, battery-backup mode cannot be entered. Adding Hysteresis to the Power-Fail Comparator The power-fail comparator has a typical input hysteresis of 10mV. This is sufficient for most applications where a power-supply line is being monitored through an external voltage divider (refer to the Monitoring an Additional Power Supply section). If additional noise margin is desired, connect a resistor between PFO and PFI as shown in Figure 22A. Select the ratio of R1 and R2 such that PFI sees 1.25V when V IN falls to its trip point (V TRIP). R3 adds the hysteresis and will typically be more than 10 times the value of R1 or R2. The hysteresis window extends both above (V H) and below (VL) the original trip point (V TRIP). VCC 3.0V or 3.3V GND VBATTERY VOUT CONNECT TO STATIC RAM TO µP 0.1F CONNECT pin 7* 1N4148 VCC 3.0V or 3.3V GND VBATTERY VOUT RESET for the SP690T/S/R and the SP802T/S/R RESET for the SP804T/S/R and the SP805T/S/R * CONNECT TO STATIC RAM TO µP 0.1F CONNECT pin 7* 1N4148 +5V Figure 21. Using a High Capacity Capacitor as a Backup Power Source A) B) |
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