Date: Apr2-07

SP6203/SP6205 Low Noise, 300 and 500mA CMOS LDO Regulators

© 2007 Sipex Corporation



Date: 2//05

SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators

© Copyright 2005 Sipex Corporation

General Overview

The SP6203/6205 is intended for applications

where very low dropout voltage, low supply

current and low output noise are critical, even

with high load conditions (500mA maximum).

Unlike bipolar regulators, the SP6203/6205

(CMOS LDO) supply current increases only

slightly with load current.

The SP6203/6205 contains an internal bandgap

reference which is fed into the inverting input of

the LDO-amplifier. The output voltage is then

set by means of a resistor divider and compared

to the bandgap reference voltage. The error

LDO-amplifier drives the gate of a P-channel

at 500mA producing a 300mV drop at the out-

put.

Furthermore, the SP6203/6205 has its own cur-

rent limit circuitry (500mA/850mA) to ensure

that the output current will not damage the

device during output short, overload or start-up.

Also, the SP6203/6205 includes thermal shut-

down circuitry to turn off the device when the

junction temperature exceeds 170°C and it re-

mains off until the temperature drops by 12°C.

Enable/Shutdown Operation

The SP6203/6205 is turned off by pulling the

above 1.6V.

If this enable/shutdown feature is not required,

it should be tied directly to the input supply

voltage to keep the regulator output on at all

time.

(turn-off time is dependent on load conditions

consumption drops nearly to zero.

input Capacitor

to GND if a battery is used as the power

source. Any good quality electrolytic, ceramic

or tantalum capacitor may be used at the input.

Output Capacitor

and GND to prevent oscillation. A 2.2µF output

capacitor is recommended.

Larger values make the chip more stable which

means an improvement of the regulator’s tran-

sient response. Also, when operating from other

sources than batteries, supply-noise rejection

can be improved by increasing the value of the

input and output capacitors and using passive

filtering techniques.

For a lower output current, a smaller output

capacitance can be chosen.

Finally, the output capacitor should have an

effective series resistance (ESR) of 0.5 or less.

Therefore, the use of good quality ceramic or

tantalum capacitors is advised.

Bypass Capacitor

A bypass pin (BYP) is provided to decouple the

bandgap reference. A 10nF external capacitor

connected from BYP to GND reduces noise

present on the internal reference, which in turn

significantly reduces output noise and also im-

proves power supply rejection. Note that the

maintain stability when the bypass capacitor is

margin. If output noise is not a concern, this

input may be left unconnected. Larger capacitor

values may be used to further improve power

supply rejection, but result in a longer time

period (slower turn on) to settle output voltage

when power is initially applied.

No Load Stability

The SP6203/6205 will remain stable and in

regulation with no external load (other than the

internal voltage driver) unlike many other volt-

age regulators. This is especially important in

CMOS RAM battery back-up applications.

THEORY OF OPERATiON