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SST26VF032B-104I/SM 数据表(PDF) 35 Page - Microchip Technology |
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SST26VF032B-104I/SM 数据表(HTML) 35 Page - Microchip Technology |
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35 / 82 page ![]() 2013-2022 Microchip Technology Inc. and its subsidiaries DS20005218K-page 35 SST26VF032B/SST26VF032BA 5.33 Read Block Protection Register (RBPR) The Read Block Protection Register instruction outputs the Block Protection register data which determines the protection status. To execute a Read Block Protection Register operation, the host drives CE# low, and then sends the Read Block Protection Register command cycle (72H). A dummy cycle is required in SQI mode. After the command cycle, the device outputs data on the falling edge of the SCK signal starting with the most significant bit(s), see Table 5-6 for definitions of each bit in the Block Protection register. The RBPR command does not wrap around. After all data has been output, the device will output 0H until terminated by a low-to- high transition on CE#. See Figure 5-36 and Figure 5-37. FIGURE 5-36: READ BLOCK PROTECTION REGISTER SEQUENCE (SQI) FIGURE 5-37: READ BLOCK PROTECTION REGISTER SEQUENCE (SPI) Note: MSN = Most Significant Nibble, LSN = Least Significant Nibble Block Protection Register (BPR), m = 79 for SST26VF032B/032BA, C[1:0]=72H MODE 3 0 SCK SIO[3:0] CE# C1 C0 2 H0 L0 MSN LSN 4 H1 L1 6 H2 L2 8 H3 L3 10 H4 L4 12 HN LN BPR [m:m-7] BPR [7:0] XX CE# SIO0 SCK 012345678 32 33 24 MODE 3 MODE 0 15 16 23 72H SIO OP Code Data Byte 0 Data Byte 1 Data Byte 2 Data Byte N |
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