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SST26VF032B-104I/SM 数据表(PDF) 13 Page - Microchip Technology |
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SST26VF032B-104I/SM 数据表(HTML) 13 Page - Microchip Technology |
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13 / 82 page  2013-2022 Microchip Technology Inc. and its subsidiaries DS20005218K-page 13 SST26VF032B/SST26VF032BA 5.0 INSTRUCTIONS Instructions are used to read, write (erase and pro- gram), and configure the SST26VF032B/032BA. The complete list of the instructions is provided in Table 5-1. TABLE 5-1: DEVICE OPERATION INSTRUCTIONS FOR SST26VF032B/032BA Instruction Description Command Cycle(1) Mode Address Cycle(s)(1,2) Dummy Cycle(s)(3) Data Cycle(s)(3) Max Freq(1) SPI SQI Configuration NOP No Operation 00H X X 0 0 0 104 MHz / 80 MHz RSTEN Reset Enable 66H X X 0 0 0 RST(5) Reset Memory 99H X X 0 0 0 EQIO Enable Quad I/O 38H X 0 0 0 RSTQIO(6) Reset Quad I/O FFH X X 0 0 0 RDSR Read STATUS Register 05H X0 0 1 to ∞ X0 1 1 to ∞ WRSR Write STATUS Register 01H X X 0 0 2 RDCR Read Configuration Register 35H X0 0 1 to ∞ X0 1 1 to ∞ Read Read Read Memory 03H X 3 0 1 to ∞ 40 MHz High- Speed Read Read Memory at Higher Speed 0BH X3 3 1 to ∞ 104 MHz / 80 MHz X3 1 1 to ∞ SQOR(7) SPI Quad Output Read 6BH X 3 1 1 to ∞ SQIOR(8) SPI Quad I/O Read EBH X 3 3 1 to ∞ SDOR(9) SPI Dual Output Read 3BH X 3 1 1 to ∞ SDIOR(10) SPI Dual I/O Read BBH X 3 1 1 to ∞ 80 MHz SB Set Burst Length C0H X X 0 0 1 104 MHz / 80 MHz RBSQI SQI Read Burst with Wrap 0CH X 3 3 n to ∞ RBSPI(8) SPI Read Burst with Wrap ECH X 3 3 n to ∞ Identification JEDEC-ID JEDEC-ID Read 9FH X 0 0 3 to ∞ 104 MHz / 80 MHz Quad J-ID Quad I/O J-ID Read AFH X 0 1 3 to ∞ SFDP Serial Flash Discoverable Parameters 5AH X 3 1 1 to ∞ Write WREN Write Enable 06H X X 0 0 0 104 MHz / 80 MHz WRDI Write Disable 04H X X 0 0 0 SE(11) Erase 4 Kbytes of Memory Array 20H X X 3 0 0 BE(12) Erase 64, 32 or 8 Kbytes of Memory Array D8H X X 3 0 0 CE Erase Full Array C7H X X 0 0 0 PP Page Program 02H X X 3 0 1 to 256 SPI Quad PP(7) SQI Quad Page Program 32H X 3 0 1 to 256 |
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