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STR91XFA 数据表(PDF) 51 Page - STMicroelectronics |
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STR91XFA 数据表(HTML) 51 Page - STMicroelectronics |
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51 / 78 page ![]() STR91xFA Electrical characteristics 51/78 Figure 11. LVD reset delay case 2 6.4 DC electrical characteristics VDDQ = 2.7 - 3.6V, VDD = 1.65 - 2V, TA = -40 / 85 °C unless otherwise specified. Table 10. DC Electrical Characteristics Symbol Parameter Test Conditions Value Unit Min Typ Max VIH Input High Level General inputs(1) 1. Guaranteed by characterization, not tested in production. 2.0 (2) 2. Input pins are 5V tolerant, max input voltage is 5.5V V RESET and TCK inputs(1) 0.8VDDQ TAMPER_IN input(3) 3. Guaranteed by design, not tested in production. VDDQ/2 VIL Input Low Level General inputs(1) 0.8 RESET and TCK inputs(1) 0.2VDDQ TAMPER_IN input(3) VDDQ/2 VHYS Input Hysteresis Schmitt Trigger General inputs(4) 4. TAMPER_IN pin has no built-in hysteresis 0.4 V VOH Output High Level High current pins I/O ports 3 and 6: Push-Pull, IOH = 8mA VDDQ-0.7 V Output High Level Standard current pins I/O ports 0,1,2,4,5,7,8,9: Push-Pull, IOH = 4mA VDDQ-0.7 Output High Level JTAG JTDO pin IOH= -100 µA VDDQ-0.1 VOL Output Low Level High current pins I/O ports 3 and 6: Push-Pull, IOL = 8mA 0.4 V Output Low Level Standard current pins I/O ports 0,1,2,4,5,7,8,9: Push-Pull, IOL = 4mA 0.4 Output Low Level JTAG JTDO pin IOL=100 µA 0.1 VDD_LVD+ VDDQ_LVD+ ~10 ms delay VDDQ (red) RESET_OUTn (blue) VDD (green) |
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