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PLL602-30DC 数据表(PDF) 3 Page - PhaseLink Corporation |
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PLL602-30DC 数据表(HTML) 3 Page - PhaseLink Corporation |
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3 / 8 page ![]() PLL602-30 750kHz – 800MHz Low Phase Noise XO (for 12 – 25MHz Crystals) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 3. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Fout<24MHz 25/25/15 24MHz<Fout<96MHz 65/45/30 Supply Current, Dynamic (with Loaded Outputs) IDD PECL/LVDS/CMOS 96MHz<Fout<700MHz 100/80/40 mA Operating Voltage VDD 2.97 3.63 V Output Clock Duty Cycle @ 50% VDD (CMOS) @ 1.25V (LVDS) @ VDD – 1.3V (PECL) 45 45 45 50 50 50 55 55 55 % Short Circuit Current ±50 mA 4. Jitter Specifications PARAMETERS CONDITIONS FREQUENCY MIN. TYP. MAX. UNITS 19.44MHz 2.1 77.76MHz 3.5 106.25MHz 4.1 155.52MHz 4.3 Period jitter RMS1 With capacitive decoupling between VDD and GND. Over 10,000 cycles. 622.08MHz 6.0 ps 19.44MHz 17 77.76MHz 30 106.25MHz 28 155.52MHz 27 Period jitter Peak-to- Peak1 With capacitive decoupling between VDD and GND. Over 10,000 cycles. 622.08MHz 40 ps 155.52MHz 2.6 4 Integrated jitter RMS2 Integrated 12 kHz to 20 MHz 622.08MHz 2.5 4 ps 5. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS 19.44MHz -80 -108 -132 -142 -142 106.25MHz -70 -98 -122 -123 -117 155.52MHz -60 -90 -115 -125 -119 Phase Noise2 relative to carrier (typical) 622.08MHz -50 -77 -102 -115 -108 dBc/Hz 1) Jitter analyzer: Wavecrest SIA-3000 2) Phase Noise System: Agilent E5500 |
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