PLL602-30

750kHz – 800MHz Low Phase Noise XO (for 12 – 25MHz Crystals)

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 7

PAD ASSIGNMENT

Pad #

Name

X (

µm)

Y (

µm)

Description

1

GND

248

109

Ground.

2

GND

361

109

Ground.

3

GND

473

109

Ground.

4

GND

587

109

Ground.

5

GND

702

109

Ground.

6

N/C

874

109

No Connection.

7

GND

1042

109

Ground.

8

GNDBUF

1171

109

Ground, buffer circuitry.

9

OE_SELECT

1400

125

Used to select between PECL or CMOS logic states for OE.

Internal pull up.

10

LVDS

1400

259

LVDS Output.

11

PECL

1400

476

PECL Output.

12

VDDBUF

1400

616

3.3V power supply, Buffer circuitry.

13

VDDBUF

1400

716

3.3V power supply, Buffer circuitry.

14

PECLB

1400

871

Complementary PECL Output.

15

LVDSB

1400

1089

Complementary LVDS Output.

16

CMOS

1400

1227

CMOS Output.

17

GNDBUF

1389

1365

Ground, buffer circuitry.

18

OUTSEL1

1232

1365

Used to select CMOS, PECL or LVDS output type. Internal pull

up.

19

SEL1

1042

1365

Used to select multiplication factor. Internal pull up.

20

SEL0

854

1365

Used to select multiplication factor. Internal pull up.

21

VDD

659

1365

3.3V power supply.

22

VDD

559

1365

3.3V power supply.

23

VDD

459

1365

3.3V power supply.

24

VDD

358

1365

3.3V power supply.

25

OUTSEL0

194

1365

Used to select CMOS, PECL or LVDS output type. Internal pull

up.

26

XIN

109

1223

Crystal input. See crystal specification page 3.

27

XOUT

109

1017

Crystal output. See crystal specification page 3.

28

SEL3

109

858

Used to select multiplication factor. Internal pull up.

29

SEL2

109

646

Used to select multiplication factor. Internal pull up.

30

OE_CTRL

109

397

Used to enable/disable the output(s). See Output Selection and

Enable table on page 1.

31

NC

109

181

No Connect