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TSB622 数据表(PDF) 18 Page - STMicroelectronics

部件名 TSB622
功能描述  High bandwidth (52 MHz), rail-to-rail output, 36 V op amp
PDF  36 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

TSB622 数据表(HTML) 18 Page - STMicroelectronics

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5
Application information
5.1
Operating voltages
The TSB952 device can operate from 4.5 to 36 V. The parameters are fully specified at 5 V, 12 V, and 36 V power
supplies. However, the parameters are very stable over the full VCC range and several characterization curves
show the TSB592 device characteristics over the full operating range. Additionally, the main specifications are
guaranteed in an extended temperature range from -40 to +125 °C.
The input common-mode range includes the VCC- (low rail) but is limited to VCC+ -1.5 V.
5.2
Input pin voltage range
The TSB952 has internal ESD diode protections on the inputs. These diodes are connected between the inputs
and each supply rail to protect the input stage from electrical discharge, as shown in the figure below.
Figure 43. Input current limitation
In-
In+
Out
Vcc+
Vcc-
-
+
Out
VCC -
VCC +
D1
D2
When the input pin voltage exceeds the power supply, the ESD diodes become conductive and, depending on
this voltage, excessive current can flow through them. Without a limitation this overcurrent can damage the
device. Thus, the current has to be limited to 10 mA by adding a resistance in series with the input pin.
Similarly, the differential input voltage is limited by two back-to-back groups of two diodes in series between the
positive and negative inputs. In order to avoid excessive current in these diodes, the differential voltage should be
limited to ±1.4 V, or the current limited to 10 mA. Such a high differential voltage can be reached when the output
is in saturation mode, or slew rate limited. In particular, it can happen when the device is used in comparator
mode.
The TSB952 does not show any phase reversal for any input common-mode voltage inside the absolute
maximum ratings (AMR) voltage window, (VCC-) -200 mV < VICM < (VCC+) +200 mV.
5.3
Input offset voltage drift over the temperature
The maximum input voltage drift variation overtemperature is defined as the offset variation related to the offset
value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and
the amplifier input offset (VIO) is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can
be compensated during production at application level. The maximum input voltage drift overtemperature enables
the system designer to anticipate the effect of temperature variations. The maximum input voltage drift
overtemperature is computed using Eq. (1).
ΔVIOΔT
=max VIOT−VIO25°C
T−25°C T= −40°CandT=125°C
(1)
The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk
(process capability index) greater than 1.3.
TSB952
Application information
DS14576 - Rev 1
page 18/36



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