Data Sheet

ADL8101

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 6 of 35

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RFIN

RF Input. The RFIN pin is DC-coupled and matched to 50 Ω. See Figure 3 for the interface schematic.

2, 6

GND

Ground. Connect to a ground plane that has low electrical and thermal impedance. See Figure 4 for the interface schematic.

3

RBIAS

Bias Setting Resistor. Connect a resistor between RBIAS and VDDx to set IDQ. See Figure 121 and Table 8 for more details. See

Figure 5 for the interface schematic.

4, 7

NIC

No Internal Connection. The NIC pin is not connected internally. For normal operation, connect the NIC pin to ground.

5

RFOUT/VDD1

RF Output and Drain Bias Voltage. The RF output is DC-coupled and also serves as the drain biasing node. For the drain

bias voltage, connect a DC bias network to provide the drain current and AC-couple the RF output path. See Figure 6 for the

interface schematic.

8

ACG/VDD2

AC Ground and Optional Alternative Drain Bias. Connect a capacitor between the ACG/VDD2 pin and ground. The ACG/VDD2

pin can also be used as the drain biasing node through an internal resistor. Do not use the ACG/VDD2 pin simultaneously with

the RFOUT/VDD1 pin. See Figure 6 for the interface schematic.

GROUND PADDLE

Ground Paddle. Connect the ground paddle to a ground plane that has low electrical and thermal impedance.

INTERFACE SCHEMATICS

Figure 3. RFIN Interface Schematic

Figure 4. GND Interface Schematic

Figure 5. RBIAS Interface Schematic

Figure 6. RFOUT/VDD1 and ACG/VDD2 Interface Schematic