LD5523K

05/16/2018

6

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD5523K-DS-00 May 2018

PARAMETER

CONDITIONS

SYMBOL

MIN

TYP

MAX

UNITS

QRD (Quasi Resonant Detection, FB Pin)

FB OVP Trip voltage Level

VFB_OVP

3.3

3.5

3.7

V

FB OVP De-bounce Time

TFB_OVP

8

Cycle

FB UVP Trip voltage Level

(1)

VFB_UVP

0.8

V

QRD Trip Level

(1)

IQRD

20

A

OTP (Over Temperature, CS Pin)

CS OTP Level

VCS_LIMIT

VCS_OTP

0.48

0.5

0.52

V

CS OTP de-bounce time

(1)

TCS_OTP

5.4

ms

Oscillator for Switching Frequency

CCM Frequency

FCCM

60

65

70

kHz

Frequency Swapping

(1)

FSW_MOD

±8

%

Green Mode Frequency

FSW_GREEN

21

24

27

kHz

Temp. Stability

(1)

FSW_TS

3

5

%

Voltage Stability

VCC =9V~24V

(1)

FSW_VS

1

%

Maximum Duty

(1)

DMAX

81

%

Gate Drive Output (OUT Pin)

Output Low Level

VCC =15V, Io=20mA

(1)

VOL

1

V

Output High Level

VCC =15V, Io=20mA

VOH

9

14

V

Rising Time

VCC =15V CL=1000pF

Tr

280

ns

Falling Time

VCC =15V CL =1000pF

Tf

30

ns

Output High Clamp Level

VCC =18V

VO_CLAMP

11.5

V

Soft Start

Soft Start Time

VCS_OFF

from

0.2V

to

0.5V

(1)

TSS

7

ms

SDSP (Secondary Diode Short Protection)

SDSP CS Pin Level

Secondary diode short

VCS_SDSP

1.3

V

De-bounce Cycle

(1)

TD_SDSP

4

Cycle

Open Loop Protection

OLP Trip Level

VOLP

2.8

V

OLP delay time

After soft-start

TD_OLP

88

ms

On Chip OTP (Over Temperature Protection)

OTP Level

(1,2)

TINOTP

140

C

OTP Hysteresis

(1,2)

TINOTP_HYS

12

C

Notes:

1. Guaranteed by design.

2. The threshold temperature for enabling the output again and resetting the latch after OTP has been activated.