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LD5523KGL 数据表(PDF) 10 Page - Leadtrend Technology |
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LD5523KGL 数据表(HTML) 10 Page - Leadtrend Technology |
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10 / 17 page ![]() LD5523K 05/16/2018 10 Leadtrend Technology Corporation www.leadtrend.com.tw LD5523K-DS-00 May 2018 If VDS voltage falls to resonant valley level from max plateau value, the QRD comparator will be tripped while FB pin current is close to 20 A. However, the QR detection will be influenced by propagation delay. If inductance of primary winding is less than 500 H, there is no valley detection in Vds (as shown in Fig. 11). L<500μ H Vaux. 0V VQRD(IFB=20µA) t TPD TPD Fig. 11 Voltage Feedback Loop The voltage feedback signal is provided from the TL431 at the secondary side through the photo-coupler to the COMP pin of the LD5523K. Similar to UC3842, the LD5523K would without voltage offset to feed the voltage divider at the ratio of RA and RB, that is, COMP COMPARATOR V RB RA RB ) PWM ( V A pull-high resistor is embedded internally and therefore no external one is required. The LD5523K integrates the multi-mode PWM controller, and for enhance the light load efficiency, the comp pin value corresponding to the frequency is as shown in Fig. 12. VCOMP FSW 65kHz 24kHz 0.5V 0.6V Green Mode + QR PWM/CCM 1.1V 1.45V Max. frequency depends on LM Fig. 12 Current Sensing, Leading Edge Blanking The typical current mode of PWM controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. The LD5523K detect the primary MOSFET current from the CS pin, which is not only for the peak current mode control but also for the pulse-by-pulse current limit. The maximum voltage threshold of the current sensing pin sets at 0.5V. From above, the MOSFET peak current can be obtained from below. CS ) MAX ( PEAK R V 5 . 0 I A 275ns leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger from the current spike. In the low power application, if the total pulse width of the turn-on spike is less than 275ns and the negative spike on the CS pin doesn ’t exceed -0.3V, it could remote the R-C filter (as shown in the Fig. 13). However, the total pulse width of the turn-on spike is decided by the output power, circuit design and PCB layout. It is strongly recommended to adopt a smaller R-C filter (as shown in Fig. 14) for higher power application to avoid the CS pin being damaged by the negative turn-on spike. |
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