MPQ1925

– 100V, 4A, HIGH-FREQUENCY, HALF-BRIDGE GATE DRIVER

MPQ1925 Rev. 1.0

MonolithicPower.com

3

3/8/2022

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2022 MPS. All Rights Reserved.

PIN FUNCTIONS

Pin #

Name

Description

1

VDD

Supply input. The VDD pin supplies power to the internal circuitry. Place a decoupling

capacitor to ground, close to VDD, to ensure a stable and clean supply.

2

BST

Bootstrap. The BST pin is the positive power supply for the internal, high-side MOSFET

(HS-FET) floating driver. Connect a bypass capacitor between the BST and SW pins.

3

DRVH

Floating driver output.

4

SW

Switching node.

5

INH

Floating driver control signal input.

6

INL

Low-side (LS) driver control signal input.

7

VSS,

exposed

pad

Chip ground. Connect the VSS pin to the exposed pad for proper thermal operation.

8

DRVL

LS driver output.

ABSOLUTE MAXIMUM RATINGS (1)

Supply voltage (VDD) .....................-0.3V to +18V

SW voltage (VSW) ...........................-5V to +105V

SW voltage (VSW) ......... -25V (<100ns) to +105V

BST voltage (VBST) ......................-0.3V to +115V

BST voltage (VBST) ....... -15V (<100ns) to +115V

BST to SW ....................................-0.3V to +18V

DRVH to SW (2) ..........................-0.3V to +18.3V

DRVH to SW (2)

…………-5V (<100ns) to +18.3V

DRVH to VSS.........-0.3V to (BST - VSS) + 0.3V

DRVH to VSS .....................................................

…………...-15V (<100ns) to (BST - VSS) +0.3V

DRVL to VSS (2) .........................-0.3V to +18.3V

DRVL to VSS (2) ............ -5V (<100ns) to +18.3V

INH/INL to VSS................-0.3V to (VDD + 0.3V)

INH/INL to VSS ...................................................

…..……………….-5V (<100ns) to (VDD + 0.3V)

All other pins ..................... -0.3V to (VDD + 0.3V)

Continuous power dissipation (TA = 25°C) (3)

QFN-8 (4mmx4mm) ................................. 2.66W

Junction temperature ................................150°C

Lead temperature .....................................260°C

Storage temperature ................ -65°C to +150°C

ESD Ratings

Human body model (HBM) ..................... ±1.5kV

Charged device model (CDM)..................±750V

Recommended Operating Conditions (4)

Supply voltage (VDD) ...........................8V to 15V

SW voltage (VSW) ...........................-1V to +100V

SW slew rate......................................... <50V/ns

Operating junction temp (TJ = TA) .......................

…………………………………...-40°C to +150°C

Thermal Resistance (5)

θJA

θJC

QFN-8 (4mmx4mm)................ 47 ....... 7.... °C/W

Notes:

1) Exceeding these ratings may damage the device. The

repetitive pulse rating is guaranteed for a period of

≤100ns

with a 1000kHz maximum repetition rate when VDD is ≤15V.

2) DRVH and DRVL are outputs pins that cannot be connected

to the external supply voltage.

3) The maximum allowable power dissipation is a function of the

maximum junction temperature, TJ (MAX), the junction-to-

ambient

thermal

resistance,

θ

JA,

and

the

ambient

temperature, TA. The maximum allowable continuous power

dissipation at any ambient temperature is calculated by PD

(MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum

allowable power dissipation can produce an excessive die

temperature, which may cause the regulator to go into

thermal

shutdown.

Internal

thermal

shutdown

circuitry

protects the device from permanent damage.

4) The device is not guaranteed to function outside of its

operating conditions.

5) Measured on JESD51-7, 4-layer PCB.