24LCS61/24LCS62

DS21226E-page 10

 2004 Microchip Technology Inc.

6.0

WRITE OPERATIONS

6.1

Byte Write

Following the Start signal from the master, the control

byte for a Write command is sent by the master

transmitter. The device will acknowledge this control

byte during the ninth clock pulse. The next byte

transmitted by the master is the ID byte for the device.

After receiving another Acknowledge signal from the

24LCS61/62, the master device will transmit the

address and then the data word to be written into the

addressed

memory

location.

The

24LCS61/62

acknowledges between each byte, and the master then

generates a Stop condition. This initiates the internal

write cycle, and during this time the 24LCS61/62 will

not generate Acknowledge signals (Figure 6-1).

6.2

Page Write

The control byte, ID byte, word address, and the first

data byte are transmitted to the 24LCS61/62 in the

same way as in a byte write. But, instead of generating

a Stop condition, the master transmits up to 15

additional data bytes to the 24LCS61/62, which are

temporarily stored in the on-chip page buffer and will be

written into the memory after the master has transmit-

ted a Stop condition. If the master should transmit more

than 16 bytes prior to generating the Stop condition, the

address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received an

internal write cycle will begin (Figure 6-2) and the

24LCS61/62 will not generate acknowledge.

6.3

Low Voltage Write Protection

circuit which disables the internal erase/write logic, if

6.4

Set Write Protection Command

The Set Write Protection command allows the user to

write-protect a portion of the array. For the 24LCS51

this command will write-protect the entire array. For the

24LCS62 this command will protect the lower half of

the array. This command is illustrated in Figure 6-3.

This is a one time only command and cannot be

reversed once the protection fuse has been set.

Once the write-protect feature has been set, the device

will no longer acknowledge the control byte (or any of

the other bytes) of this command. The Stop bit of this

command initiates an internal write cycle, and during

this

time

the

24LCS61/62

will

not

generate

Acknowledge signals.

FIGURE 6-1:

BYTE WRITE

Note:

Page write operations are limited to writing

bytes within a single physical page,

regardless of the number of bytes actually

being written. Physical page boundaries

start

at

addresses

that

are

integer

multiples of the page buffer size (or ‘page

size’) and end at addresses that are

integer multiples of [page size - 1]. If a

Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page as might be

expected. It is therefore necessary for the

application software to prevent page write

operations that would attempt to cross a

page boundary.

S

T

A

R

T

S

T

O

P

DEVICE

ID BYTE

DATA

CONTROL

BYTE

A

C

K

A

C

K

A

C

K

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

A

C

K

ADDRESS

BYTE

1

01 0 O 01 0

S

E

OE Bit = EDS Pin Output Enable; see Section 9.0 “External Device Select (EDS) Pin and Output Enable (OE) Bit”

P