TDA8366H datasheet(13/48 Pages) PHILIPS

13 / 48 page

January 1995

Philips Semiconductors

Objective speciﬁcation

I2C-bus controlled PAL/NTSC TV

processor

TDA8366

INPUT CONTROL BITS

Table 3

Source select 1

Table 4

Source select 2

Table 5

Phase 1 (

ϕ1) time constant

Note

1. X = don’t care.

Table 6

Crystal indication

INA

INB

DECODER AND TXT

CVBSINT

CVBSEXT

S-VHS

S-VHS (CVBSEXT)

INC

IND

PIP

CVBSINT

CVBSEXT

S-VHS

S-VHS (CVBSEXT)

FOA

FOB(1)

MODE

normal

slow

fast

CRYSTAL

two 3.6 MHz

one 3.6 MHz (pin 32)

one 4.4 MHz (pin 33)

3.6 MHz (pin 32) and 4.4 MHz

(pin 33)

Table 7

Forced ﬁeld frequency

Note

1. When the forced mode is selected the divider will only

switch to that position when the horizontal oscillator is

not synchronized.

Table 8

Interlace

Table 9

Standby

Table 10 Synchronization mode

Table 11 Colour decoder mode

FORF

FORS

FIELD FREQUENCY

auto (60 Hz when line not

synchronized)

60 Hz; note 1

50 Hz; note 1

auto (50 Hz when line not

synchronized)

STATUS

interlace

de-interlace

STB

MODE

standby

normal

POC

MODE

active

not active

CM2

CM1

CM0

DECODER MODE

not forced, own intelligence

forced NTSC 3.6 MHz

forced PAL 4.4 MHz

forced SECAM

forced NTSC 4.4 MHz

forced PAL 3.6 MHz (pin 32)

forced PAL 3.6 MHz (pin 33)

no function

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