| 数据搜索系统,热门电子元器件搜索 |
|
AD8123ACPZ-R2 数据表(PDF) 12 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8123ACPZ-R2 数据表(HTML) 12 Page - Analog Devices |
|
12 / 16 page ![]() AD8123 Rev. 0 | Page 12 of 16 SYNC PULSE EXTRACTION USING COMPARATORS The AD8123 is useful in many systems that transport computer video signals, which are typically comprised of red, green, and blue (RGB) video signals and separate horizontal and vertical sync signals. Because the sync signals are separate and not embedded in the color signals, it is advantageous to transmit them using a simple scheme that encodes them among the three common-mode voltages of the RGB signals. The AD8134, AD8147, and AD8148 triple differential drivers are natural complements to the AD8123 seeing that they perform the sync pulse encoding with the necessary circuitry on-chip. The sync encoding equations follow: [ H V K V Red CM − = 2 ] (1) [ V 2 2 − = K V Green CM ] (2) [ H V K V Blue CM + = 2 ] (3) where: Red VCM, Green VCM, and Blue VCM are the transmitted common- mode voltages of the respective color signals. K is an adjustable gain constant that is set by the driver. V and H are the vertical and horizontal sync pulses, defined with a weight of −1 when the pulses are in their low states, and a weight of +1 when they are in their high states. The AD8134 and AD8146/AD8147/AD8148 data sheets contain further details regarding the encoding scheme. Figure 20 illustrates how the AD8123 comparators can be used to extract the horizontal and vertical sync pulses that are encoded on the RGB common- mode voltages by the aforementioned drivers. USING THE VPEAK, VPOLE, VGAIN, AND VOFFSET INPUTS The VPEAK input is the main peaking control and is used to compensate for the low-pass roll-off in the cable response. The VPOLE input is a secondary frequency response shaping control that shifts the positions of the equalizer poles. The VGAIN input controls the wideband flat gain and is used to compensate for the low frequency cable loss that is nominally flat. The VOFFSET input is used to produce an offset at the AD8123 output. The output offset is equal to the voltage applied to the VOFFSET input, limited by the output swing limits. The VPEAK and VPOLE controls can be used independently or they can be coupled together to form a single peaking control. While Figure 17 and Figure 18 show recommended settings vs. cable length, designers may find other combinations that they prefer. These two controls give designers extra freedom, as well as the ability to compensate for different cable types (such as UTP and coaxial cable), as opposed to having only a single frequency shaping control. In some cases, as would likely be with automatic control, the VPEAK control is derived from a low impedance source, such as an op amp. Figure 21 shows how to derive VPOLE from VPEAK in a UTP application according to the recommended curves shown in Figure 17, when VPEAK originates from a low impedance source. Clearly, the 5 V supply must be clean to provide a clean VPOLE voltage. VPEAK 2 + 0.9V 20Ω 5.11kΩ VPEAK VPOLE ≈ 5V 14kΩ 8.25kΩ VPEAK Figure 21. Deriving VPOLE from VPEAK with Low-Z Source for UTP Cable The 20 Ω series resistor in the VPEAK path provides capacitive load buffering for the op amp. This value can be modified, depending on the actual capacitive load. In automatic equalization circuits that place the control voltages inside feedback loops, attention must be paid to the poles produced by the summing resistors and load capacitances. The peaking can also be adjusted by a mechanical or digitally controlled potentiometer. In these cases, if the resistance of the potentiometer is a couple of orders of magnitude lower than the values of the resistors used to develop VPOLE, its resistance can be ignored. Figure 22 shows how to use a 500 Ω potentiometer with the resistor values shown in Figure 21 scaled up by a factor of 10. VPEAK 2 + 0.9V 51.1kΩ VPEAK VPOLE ≈ 5V 5V 140kΩ 82.5kΩ 750Ω 500Ω Figure 22. Deriving VPOLE from VPEAK with Potentiometer for UTP Cable Many potentiometers have wide tolerances. If a wide tolerance potentiometer is used, it may be necessary to change the value of the 750 Ω resistor to obtain a full swing for VPEAK. The VGAIN input is essentially a contrast control and can be set by adjusting it to produce the correct amplitude of a known test signal (such as a white screen) at the AD8123 output. VGAIN can also be derived from VPEAK according to the linear relationships shown in Figure 17 and Figure 18. Figure 23 shows how to derive VPOLE and VGAIN from VPEAK in a UTP application that originates from a low-Z source. VPEAK 2 + 0.9V 20Ω 5.11kΩ VPEAK VPOLE ≈ 5V 14kΩ 8.25kΩ 5.11kΩ VGAIN ≈ 0.89 × VPEAK + 0.38V 5V 60.4kΩ 133kΩ VPEAK Figure 23. Deriving VPOLE and VGAIN from VPEAK with Low-Z Source for UTP Cable |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |