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AD8123ACPZ-R7 数据表(PDF) 15 Page - Analog Devices

部件名 AD8123ACPZ-R7
功能描述  Triple Differential Receiver with Adjustable Line Equalization
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8123ACPZ-R7 数据表(HTML) 15 Page - Analog Devices

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AD8123
Rev. 0 | Page 15 of 16
100Ω
49.9Ω
1
2
3
RECEIVED
SIGNAL
+5V
ONE AD8123
INPUT
ONE AD8143 CHANNE L
POWER SUPPLIES = ±12V
–5V
HBAT-540C
SMALL SIGNAL FREQUENCY RESPONSE
Though the AD8123 large signal frequency response
(VO = 1 V p-p) is of most concern, occasionally designers are
interested in the small signal frequency response. The AD8123
frequency response for VO = 300 m V p-p is shown in Figure 33
for 200 meter and 300 meter cable lengths.
FREQUENCY (MHz)
–12
–11
–10
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
1
2
3
0.1
1
10
100
0.01
VO = 300mV p-p
200 METERS
300 METERS
Figure 32. Optional Use of AD8143 in Front of AD8123 for
Wide Input Common-Mode Range
The Schottky diodes are required to protect the AD8123 from
any AD8143 outputs that may exceed the AD8123 input limits.
The 49.9 Ω resistor limits the fault current and produces a pole
at approximately 800 MHz with the effective diode capacitance of
3 pF and the AD8123 input capacitance of 1 pF. The pole drops
the response by only 0.07 dB at 100 MHz and therefore has a
negligible effect on the signal.
When using a single 5 V supply on the driver side, the
common-mode voltage at the driver is typically midsupply, or
VCM = 2.5 V. The largest received differential video signal is
approximately 700 mV p-p, and this therefore adds 175 mVPEAK
to the common-mode voltage, resulting in a worst-case peak
voltage of 2.675 V on an AD8123 input (presuming there is no
ground shift between driver and receiver). This is within the
AD8123 input voltage swing limits, and such a system works well
as long as the difference in ground potential between driver and
receiver does not cause the input voltage swing to exceed its
specified limits.
Figure 33. Small Signal Frequency Response for Various Cable Lengths
POWER-DOWN
The power-down feature is intended to be used to reduce power
consumption when a particular device is not in use and does
not place the output in a high-Z state when asserted. The input
logic levels and supply current in power down mode are presented
in the Power Supply section of Table 1.
When used, common-mode sync signals are generally applied
with a peak deviation of 500 mV and thereby increase the
common-mode level from 2.675 V to 3.175 V. This common-
mode level exceeds the specified input voltage swing limits of
±3.0 V; therefore, the AD8123 cannot be used with a system
that uses common-mode sync encoding with 500 mV sync peak
deviation and 2.5 V common-mode line level. While it is possible
to operate a driver powered from a single 5 V supply at a common-
mode voltage of <2.5 V to obtain a received voltage swing that is
within the specified limits, there is not much margin for other
shifts in the common-mode level due to interference pickup
and differing ground potentials. There are two ways to increase
the common-mode range of the overall system. One is to power
the driver from ±5 V supplies, and the other is to place an
AD8143 in front of the AD8123, as shown in Figure 32. These
techniques may be combined or applied separately.



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