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AD9956-VCO/PCB 数据表(PDF) 15 Page - Analog Devices |
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AD9956-VCO/PCB 数据表(HTML) 15 Page - Analog Devices |
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15 / 32 page  AD9956 Rev. B | Page 15 of 32 FREQUENCY (Hz) 0 –10 –20 –30 –40 –60 –50 –70 –80 –90 –100 –110 –130 –120 –140 –160 –150 –170 10 1k 100 10k 100k 10M 1M Figure 16. RF Divider and CML Driver Residual Phase Noise (840 MHz In, 105 MHz Out) FREQUENCY (Hz) 0 –10 –20 –30 –40 –60 –50 –70 –80 –90 –100 –110 –130 –120 –140 –160 –150 –170 10 1k 100 10k 100k 10M 1M Figure 17. RF Divider and CML Driver Residual Phase Noise (1240 MHz In, 155 MHz Out) FREQUENCY (Hz) 0 –10 –20 –30 –40 –60 –50 –70 –80 –90 –100 –110 –130 –120 –140 –160 –150 –170 10 1k 100 10k 100k 10M 1M Figure 18. RF Divider and CML Driver Residual Phase Noise (1680 MHz In, 210 MHz Out) FREQUENCY (Hz) 0 –10 –20 –30 –40 –60 –50 –70 –80 –90 –100 –110 –130 –120 –140 –160 –150 –170 10 1k 100 10k 100k 100M 10M 1M Figure 19. RF Divider and CML Driver Residual Phase Noise (2488 MHz In, 622 MHz Out) FREQUENCY (Hz) 0 –10 –20 –30 –40 –60 –50 –70 –80 –90 –100 –110 –130 –120 –140 –160 –150 –180 –170 10 1k 100 10k 100k 10M 1M Figure 20. Total System Phase Noise for 105 MHz Converter Clock FREQUENCY (Hz) 0 –10 –20 –30 –40 –60 –50 –70 –80 –90 –100 –110 –130 –120 –140 –160 –150 –180 –170 10 1k 100 10k 100k 10M 1M Figure 21. Total System Phase Noise for 622 MHz OC-12 Clock |
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