25AA040AX-ESLASHMS datasheet(7/28 Pages) MICROCHIP

7 / 28 page

DS21827D-page 7

25AA040A/25LC040A

BLOCK DIAGRAM

FIGURE 2-1:

READ SEQUENCE

SCK

HOLD

STATUS

I/O Control

Memory

Control

Logic

Dec

HV Generator

EEPROM

Array

Page Latches

Y Decoder

Sense Amp.

R/W Control

Logic

VCC

VSS

TABLE 2-1:

INSTRUCTION SET

Instruction Name

Instruction Format

Description

READ

0000 A8011

Read data from memory array beginning at selected address

WRITE

0000 A8010

Write data to memory array beginning at selected address

WRDI

0000 x100

Reset the write enable latch (disable write operations)

WREN

0000 x110

Set the write enable latch (enable write operations)

RDSR

0000 x101

Read STATUS register

WRSR

0000 x001

Write STATUS register

Note:

A8 is the 9th address bit, which is used to address the entire 512 byte array.

= don’t care.

SCK

2345

6789 10 11

A7 A6 A5 A4

A1 A0

76543210

Data Out

High-impedance

A3 A2

Lower Address Byte

12 13 14 15 16 17 18 19 20 21 22 23

Instruction+Address MSb

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