24C02CTESLASHMS datasheet(4/24 Pages) MICROCHIP

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24C02C

DS21202G-page 4

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

2.1

SDA Serial Data

This is a bidirectional pin used to transfer addresses

and data into and data out of the device. It is an open

drain terminal, therefore the SDA bus requires a pull-up

resistor to VCC (typical 10 k

Ω for 100 kHz, 2 kΩ for

400 kHz).

For normal data transfer SDA is allowed to change only

during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

2.2

SCL Serial Clock

This input is used to synchronize the data transfer from

and to the device.

2.3

A0, A1, A2

The levels on these inputs are compared with the

corresponding bits in the slave address. The chip is

selected if the compare is true.

Up to eight 24C02C devices may be connected to the

same bus by using different Chip Select bit combina-

tions. These inputs must be connected to either VCC or

VSS.

2.4

This is the hardware write-protect pin. It must be tied to

VCC or VSS. If tied to Vcc, the hardware write protection

is enabled. If the WP pin is tied to Vss the hardware

write protection is disabled.

2.5

Noise Protection

The 24C02C employs a VCC threshold detector circuit

which disables the internal erase/write logic if the VCC

is below 3.8 volts at nominal conditions.

The SCL and SDA inputs have Schmitt Trigger and

filter circuits which suppress noise spikes to assure

proper device operation even on a noisy bus.

3.0

FUNCTIONAL DESCRIPTIONS

The 24C02C supports a bidirectional 2-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as transmitter, and a device

receiving data as receiver. The bus has to be controlled

by a master device which generates the Serial Clock

(SCL), controls the bus access, and generates the Start

and Stop conditions, while the 24C02C works as slave.

Both master and slave can operate as transmitter or

receiver but the master device determines which mode

is activated.

Name

PDIP

SOIC

TSSOP

DFN

MSOP

Description

111

11Address Pin A0

222

22Address Pin A1

333

33Address Pin A2

VSS

444

44Ground

SDA

555

55Serial Address/Data I/O

SCL

666

66Serial Clock

Write-Protect Input

VCC

+4.5 to 5.5V Power Supply

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