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AM29243EH 数据表(PDF) 6 Page - Advanced Micro Devices |
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AM29243EH 数据表(HTML) 6 Page - Advanced Micro Devices |
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6 / 36 page  P R E L I M I N A R Y 6 Am29240 EH Microcontroller Series ™ Table 1. Product Comparison—Am29200 Microcontroller Family FEATURE Am29205 ™ Controller Am29202 ™ Controller Am29200 ™ Controller Am29245EH Controller Am29240EH Controller Am29243EH Controller Instruction Cache — — — 4 Kbytes 4 Kbytes 4 Kbytes Data Cache — — — — 2 Kbytes 2 Kbytes Cache Associativity — — — 2-way 2-way 2-way Integer Multiplier Software Software Software Software 32 x 32-bit 32 x 32-bit Memory Management Unit (MMU) — — — 1 TLB 16 Entry 1 TLB 16 Entry 2 TLBs 32 Entry Data Bus Width Internal External 32 bits 16 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits ROM Interface Banks Width ROM Size (Max/Bank) Boot-Up ROM Width Burst-Mode Access 3 8, 16 bits 4 Mbytes 16 bits Not Supported 4 8, 16, 32 bits 4 Mbytes 8, 16, 32 bits Not Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported DRAM Interface Banks Width Size: 32-Bit Mode Size: 16-Bit Mode Video DRAM Access Cycles Initial/Burst DRAM Parity 4 16 bits only — 8 Mbytes/bank Not Supported 3/2 No 4 16, 32 bits 16 Mbytes/bank 8 Mbytes/bank Not Supported 3/2 No 4 16, 32 bits 16 Mbytes/bank 8 Mbytes/bank Supported 3/2 No 4 32 bits 16 Mbytes/bank Not supported Supported 2/1 or 3/1 No 4 32 bits 16 Mbytes/bank Not supported Supported 2/1 or 3/1 No 4 32 bits 16 Mbytes/bank Not supported Not Supported 2/1 or 3/1 Yes On-Chip DMA Width (ext. peripherals) Total Number of Channels Externally Controlled External Master Access External Master Burst External Terminate Signal 8, 16 bits 2 1 No No No 8, 16, 32 bits 2 1 No No No 8, 16, 32 bits 2 2 Yes No Yes 8, 16, 32 bits 2 2 Yes Yes Yes 8, 16, 32 bits 4 4 Yes Yes Yes 8, 16, 32 bits 4 4 Yes Yes Yes Low-Voltage Operation No No No Yes Yes Yes Peripheral Interface Adapter (PIA) PIA Ports Data Width Min. Cycles Access 2 8, 16 bits 3 2 8, 16, 32 bits 3 6 8, 16, 32 bits 3 6 8, 16, 32 bits 1 6 8, 16, 32 bits 1 6 8, 16, 32 bits 1 Programmable I/O Port (PIO) Signals Signals programmable for interrupt generation 8 8 12 8 16 8 16 8 16 8 16 8 Serial Ports Ports DSR/DTR 1 Port PIO signals 1 Port PIO signals 1 Port Supported 1 Port Supported 2 Ports 1 Port Supported 2 Ports 1 Port Supported Interrupt Controller External Interrupt Pins External Trap and Warn Pins 2 0 2 0 4 3 4 3 4 3 4 3 Parallel Port Controller 32-Bit Transfer IEEE-1284 Interface Yes No No Yes Yes Yes Yes Yes No Yes Yes No Yes Yes No Yes Yes No JTAG Debug Support No Yes Yes Yes Yes Yes Serializer/Deserializer Yes Yes Yes Yes Yes No Pin Count and Package 100 PQFP 132 PQFP 168 PQFP 208 PQFP 208 PQFP 208 PQFP Operating Voltage VCC I/O Tolerance 5 V 5 V 5 V 5 V 5 V 5 V 3.3 V 5 V 3.3 V 5 V 3.3 V 5 V Processor Clock Rate 12, 16 MHz 12, 16, 20 MHz 16, 20 MHz 16 MHz 20, 25 MHz 20, 25 MHz |
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