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TDA9143 数据表(PDF) 18 Page - NXP Semiconductors |
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TDA9143 数据表(HTML) 18 Page - NXP Semiconductors |
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18 / 40 page ![]() 1996 Jan 17 18 Philips Semiconductors Preliminary specification I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor TDA9143 CHARACTERISTICS VCC =8V; Tamb =25 °C; I2C-bus address 8A; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pin 7) VCC supply voltage 7.2 8.0 8.8 V ICC supply current 50 60 70 mA Ptot total power dissipation 360 480 620 mW ICC low power supply current 12 16 22 mA Input switch Caution: the voltage on pin 25 must never exceed 5.5 V, if it does, the IC enters a test mode Y/CVBS INPUT (PIN 26) Vi(p-p) input voltage (peak-to-peak value) top sync-white − 1.0 1.43 V Zi input impedance 60 −− k Ω Ci input capacitance −− 5pF Ii(bias) input bias current − 3.3 −µA C INPUT (PIN 25) Vi(p-p) input burst voltage (peak-to-peak value) − 0.3 0.6 V Zi input impedance 60 −− k Ω Ci input capacitance −− 5pF CVBS OUTPUT (PIN 22); ONLY FOR ADDRESS 8A Vo(p-p) output voltage (peak-to-peak value) top sync-white − 1.0 − V Zo output impedance −− 500 Ω B bandwidth at −3dB CL =15pF 7 −− MHz Vtsl top-sync voltage level 2.2 2.8 3.4 V Bias generator (pin 8) VD(DEC) digital supply voltage 4.8 5.0 5.2 V Vdet(CC) POR detection level for power supply 5.7 6.0 6.3 V Vdet(DEC) POR detection level for DEC pin 4.0 4.3 4.6 V IL(DEC) current load on digital supply sum of pins 8, 11, 16, 17 −− 2.0 mA Subcarrier regeneration GENERAL; note 1 CR catching and holding range reference crystal ±500 −− Hz second crystal ±450 −− Hz ϕ phase shift for 80% deviation of catching range −− 5 deg Zi input impedance reference crystal and second crystal 0.80 1.00 1.20 k Ω |
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