TDA9143 datasheet(21/40 Pages) PHILIPS

21 / 40 page

1996 Jan 17

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled, alignment-free

PAL/NTSC/SECAM decoder/sync processor

TDA9143

CLOCHE FILTER

fres

resonant frequency

SECAM

4.26

4.29

4.31

MHz

bandwidth at

−3 dB

SECAM

241

268

295

kHz

Sync input (pin 26)

VIDEO INPUT

VY/CVBS(p-p)

sync pulse amplitude (peak-to-peak

value)

300

600

slicing level

delay of sync pulse due to internal

ﬁlter

0.2

0.3

0.4

µs

Nth

noise detector threshold level

hysteresis

235dB

delay between internally separated

vertical sync pulse and video signal

18.5

µs

Horizontal section

CLP OUTPUT (OPB/CLP MODE); HA OUTPUT (LLC/HA) MODE (BOTH ON PIN 17)

VOH

HIGH level output voltage

4.0

5.5

VOL

LOW level output voltage

−

0.2

0.4

Isink

sink current

−−

Isource

source current

−−

tW(HA)

HA pulse width (32 LLC pulses)

−

4.65

−µs

delay between middle of horizontal

sync pulse and middle of HA

note 3

0.3

0.45

0.6

µs

tW(CLP)

CLP pulse width (25 LLC pulses)

−

3.65

−µs

delay between middle of horizontal

sync pulse and start of CLP pulse

note 3

3.0

3.2

3.4

µs

σ jitter

1 in auto mode

−−

5ns

FIRST LOOP (

ϕ1)

∆f

frequency deviation when not locked

−−

1.5

∆VCC

supply voltage dependence

−

Hz/V

fCR

catching range

±625

−−

fHR

holding range

−−±1.0

kHz

static phase shift

−−

0.1

µs/kHz

LLC OUTPUT (PIN 16); LLC/HA MODE

output frequency

440

× fH

50 Hz standard

−

6.875

−

MHz

440

× f

60 Hz standard

−

6.923

−

MHz

Vo(p-p)

output amplitude

(peak-to-peak value)

0.25

−−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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