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ADA4961ACPZN-R7 数据表(PDF) 7 Page - Analog Devices |
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ADA4961ACPZN-R7 数据表(HTML) 7 Page - Analog Devices |
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7 / 24 page ![]() Data Sheet ADA4961 Rev. C | Page 7 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 2 1 3 4 5 6 18 17 16 15 14 13 MODE GND GND VIN– VIN+ GND LATCH DNC DNC VOUT– VOUT+ DNC ADA4961 TOP VIEW (Not to Scale) NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN. 2. CONNECT THE EXPOSED PAD TO GROUND. Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1, 4, 5 GND Power Supply Ground. Connect to system ground plane. 2, 3 VIN+, VIN− Differential Inputs. 6 MODE Mode Select Pin for Gain Control. Low indicates serial peripheral interface (SPI), and high (up to 3.3 V) indicates parallel interface. 7 SDIO Serial Data Input/Output Pin for SPI Gain Control. 8 A4/CLK Bit A4 for Parallel Gain Control/Serial Clock Pin for SPI Gain Control. 9 A3/CS Bit A3 for Parallel Gain Control/Chip Select Pin for SPI Gain Control. 10 A2/FA Bit A2 for Parallel Gain Control/Fast Attack Pin for SPI Gain Control. 11 A1 Bit A1 for Parallel Gain Control. 12 A0 Bit A0 for Parallel Gain Control. 13 LATCH Latch Input Asserts Parallel Gain Control. Logic 0 asserts transparent mode, and Logic 1 asserts latched mode. 14, 15, 18 DNC Do Not Connect. Do not connect to this pin. 16, 17 VOUT−, VOUT+ Differential Outputs. 19 PWUP Power-Up Control Input Pin. A logic high (3.3 V) asserts power-up. A logic low asserts power-down. 20 PM Power/Performance Control Input Pin. A logic low indicates high power and high performance, and a logic high indicates low power and nominal performance. Low power mode must be asserted with VMIN = 2.8 V. 21 VCC1 Positive Power Supply. Connect to 5 V or 3.3 V. 22 VCC2 Positive Power Supply. Connect to 5 V or 3.3 V. 23 VCC3 Positive Power Supply. Connect to 5 V or 3.3 V. 24 VCC4 Positive Power Supply. Connect to 5 V or 3.3 V. EPAD Exposed Pad. Connect the exposed pad to ground. |
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