AD8038/AD8039

Rev. G | Page 5 of 16

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

Supply Voltage

12.6 V

Power Dissipation

See Figure 5

Common-Mode Input Voltage

±VS

Differential Input Voltage

±4 V

Storage Temperature Range

−65°C to +125°C

Operating Temperature Range

−40°C to +85°C

Lead Temperature (Soldering, 10 sec)

300°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the AD8038/AD8039

package is limited by the associated rise in junction temperature

(TJ) on the die. The plastic encapsulating the die locally reaches

the junction temperature. At approximately 150°C, which is the

glass transition temperature, the plastic changes its properties.

Even temporarily exceeding this temperature limit may change

the stresses that the package exerts on the die, permanently

shifting the parametric performance of the AD8038/AD8039.

Exceeding a junction temperature of 175°C for an extended

time can result in changes in the silicon devices, potentially

causing failure.

The still-air thermal properties of the package and PCB (θJA),

ambient temperature (TA), and total power dissipated in the

package (PD) determine the junction temperature of the die.

The junction temperature can be calculated as

TJ = TA + (PD × θJA)

The power dissipated in the package (PD) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent power

is the voltage between the supply pins (VS) multiplied by the

quiescent current (IS). Assuming the load (RL) is referenced to

midsupply, then the total drive power is VS/2 × IOUT, some of which

is dissipated in the package and some in the load (VOUT × IOUT).

The difference between the total drive power and the load

power is the drive power dissipated in the package.

PD = quiescent power + (total drive power − load power)

PD = [VS × IS] + [(VS/2) × (VOUT/RL)] − [VOUT2/RL]

AMBIENT TEMPERATURE (°C)

0

–55

1.0

–25

5

35

65

95

125

1.5

2.0

SOIC-8

0.5

SC70-5

SOT-23-8

Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

RMS output voltages should be considered. If RL is referenced to

VS−, as in single-supply operation, then the total drive power is

VS × IOUT. If the rms signal levels are indeterminate, consider the

worst case, when VOUT = VS /4 for RL to midsupply

PD = (VS × IS) + (VS/4)2/RL

In single-supply operation with RL referenced to VS−, worst case

is VOUT = VS /2.

Airflow increases heat dissipation, effectively reducing θJA. In

addition, more metal directly in contact with the package leads

from metal traces, throughholes, ground, and power planes reduce

the θJA. Care must be taken to minimize parasitic capacitances at

the input leads of high speed op amps as discussed in the

Layout, Grounding, and Bypassing Considerations section.

Figure 5 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the 8-lead SOIC

(125°C/W), 5-lead SC70 (210°C/W), and 8-lead SOT-23

(160°C/W) packages on a JEDEC standard 4-layer board.

θJA values are approximations.

OUTPUT SHORT CIRCUIT

Shorting the output to ground or drawing excessive current

from the AD8038/AD8039 will likely cause a catastrophic failure.

ESD CAUTION