PIC16F913-ISLASHSP datasheet(39/330 Pages) MICROCHIP

39 / 330 page

DS41250F-page 37

PIC16F913/914/916/917/946

2.2.2.6

PIR1 Register

The PIR1 register contains the interrupt flag bits, as

shown in Register 2-6.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the global

enable bit, GIE of the INTCON register.

User

software

should

ensure

the

appropriate interrupt flag bits are clear prior

to enabling an interrupt.

PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1

R/W-0

R-0

R/W-0

EEIF

ADIF

RCIF

TXIF

SSPIF

CCP1IF

TMR2IF

TMR1IF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

EEIF: EE Write Operation Interrupt Flag bit

= The write operation completed (must be cleared in software)

= The write operation has not completed or has not started

bit 6

ADIF: A/D Converter Interrupt Flag bit

= A/D conversion complete (must be cleared in software)

= A/D conversion has not completed or has not been started

bit 5

RCIF: USART Receive Interrupt Flag bit

= The USART receive buffer is full (cleared by reading RCREG)

= The USART receive buffer is not full

bit 4

TXIF: USART Transmit Interrupt Flag bit

= The USART transmit buffer is empty (cleared by writing to TXREG)

= The USART transmit buffer is full

bit 3

SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit

= The Transmission/Reception is complete (must be cleared in software)

= Waiting to Transmit/Receive

bit 2

CCP1IF: CCP1 Interrupt Flag bit

Capture mode:

= A TMR1 register capture occurred (must be cleared in software)

= No TMR1 register capture occurred

Compare mode:

= A TMR1 register compare match occurred (must be cleared in software)

= No TMR1 register compare match occurred

PWM mode

Unused in this mode

bit 1

TMR2IF: Timer2 to PR2 Interrupt Flag bit

= A Timer2 to PR2 match occurred (must be cleared in software)

= No Timer2 to PR2 match occurred

bit 0

TMR1IF: Timer1 Overflow Interrupt Flag bit

= The TMR1 register overflowed (must be cleared in software)

= The TMR1 register did not overflow

PIC16F913-I/SP 数据表(PDF) 39 Page - Microchip Technology

PIC16F913-I/SP 数据表(HTML) 39 Page - Microchip Technology

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