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PIC16F913-I/SP 数据表(PDF) 18 Page - Microchip Technology |
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PIC16F913-I/SP 数据表(HTML) 18 Page - Microchip Technology |
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18 / 330 page ![]() PIC16F913/914/916/917/946 DS41250F-page 16 © 2007 Microchip Technology Inc. FIGURE 1-2: PIC16F914/917 BLOCK DIAGRAM PORTD RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset PORTB RB0 RB1 RB2 RB3 RB4 RB5 RB6 RB7 Flash Program Memory 13 Data Bus 8 14 Program Bus Instruction Reg Program Counter RAM File Registers Direct Addr 7 RAM Addr 9 Addr MUX Indirect Addr FSR Reg STATUS Reg MUX ALU W Reg Instruction Decode and Control Timing Generation OSC1/CLKIN OSC2/CLKOUT PORTA 8 8 8 3 8-Level Stack (13-bit) 256/352 bytes 4K/8K x 14 VSS RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 INT Configuration Internal Oscillator VDD Block Program Memory Read Data EEPROM 256 bytes PORTC RC0 RC1 RC2 RC3 RC4 RC5 RC6 RC7 PORTE (PMR) RE0 RE1 RE2 RE3/MCLR PLVD LCD Comparators Addressable USART CCP2 SSP Timer0 Timer1 Timer2 10-bit A/D CCP1 |
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