12F615 datasheet(7/168 Pages) MICROCHIP

7 / 168 page

Preliminary

DS41302A-page 5

PIC12F609/615/12HV609/615

1.0

DEVICE OVERVIEW

The PIC12F609/615/12HV609/615 devices are covered

by this data sheet. They are available in 8-pin PDIP,

SOIC, TSSOP and DFN packages.

Block Diagrams and pinout descriptions of the devices

are as follows:

• PIC12F609/HV609 (Figure 1-1, Table 1-1)

• PIC12F615/HV615 (Figure 1-2, Table 1-2)

FIGURE 1-1:

PIC12F609/HV609 BLOCK DIAGRAM

Flash

Program

Memory

Data Bus

Program

Bus

Instruction Reg

Program Counter

RAM

File

Registers

Direct Addr

RAM Addr

Addr MUX

Indirect

Addr

FSR Reg

STATUS Reg

MUX

ALU

W Reg

Instruction

Decode &

Control

Timing

Generation

OSC1/CLKIN

OSC2/CLKOUT

GPIO

8-Level Stack

64 Bytes

1K X 14

(13-Bit)

Power-up

Timer

Oscillator

Start-up Timer

Power-on

Reset

Watchdog

Timer

MCLR

VSS

Brown-out

Reset

Timer0

Timer1

GP0

GP1

GP2

GP3

GP4

GP5

Analog Comparator

T0CKI

INT

T1CKI

Configuration

Internal

Oscillator

and Reference

T1G

VDD

Block

Comparator Voltage Reference

Absolute Voltage Reference

Shunt Regulator

(PIC12HV609 only)

12F615 数据表(PDF) 7 Page - Microchip Technology

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