PACE 1757 M/ME

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Document # MICRO-10 REV B

BUS ACQUISITION

Note:

A CPU contending for the BUS will assert the

BUS REQ line, and will acquire it when BUS GNT is asserted and the BUS is not locked (BUS

LOCK is HIGH).

SWITCHING TIME TEST CIRCUITS

Standard Output (Non-Three-State)

Three-State

Parameter

≥ 3V

0.5V

0V

1.5V

1.5V