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ICS83023AMILF 数据表(PDF) 8 Page - Integrated Device Technology |
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ICS83023AMILF 数据表(HTML) 8 Page - Integrated Device Technology |
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8 / 13 page  83023AMI www.icst.com/products/hiperclocks.html REV. B JANUARY 18, 2006 8 Integrated Circuit Systems, Inc. ICS83023I DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER FIGURE 2C. HIPERCLOCKS CLK/nCLK INPUT DRIVEN BY 3.3V LVPECL DRIVER FIGURE 2B. HIPERCLOCKS CLK/nCLK INPUT DRIVEN BY 3.3V LVPECL DRIVER FIGURE 2D. HIPERCLOCKS CLK/nCLK INPUT DRIVEN BY 3.3V LVDS DRIVER 3.3V R1 50 R3 50 Zo = 50 Ohm LVPECL Zo = 50 Ohm HiPerClockS CLK nCLK 3.3V Input R2 50 Zo = 50 Ohm Input HiPerClockS CLK nCLK 3.3V R3 125 R2 84 Zo = 50 Ohm 3.3V R4 125 LVPECL R1 84 3.3V DIFFERENTIAL CLOCK INPUT INTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING and VOH must meet the V PP and VCMR input requirements. Figures 2A to 2E show interface examples for the HiPerClockS CLK/nCLK in- put driven by the most common driver types. The input inter- FIGURE 2A. HIPERCLOCKS CLK/nCLK INPUT DRIVEN BY ICS HIPERCLOCKS LVHSTL DRIVER faces suggested here are examples only. Please consult with the vendor of the driver component to confirm the driver termi- nation requirements. For example in Figure 2A, the input ter- mination applies for ICS HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver from another vendor, use their termination recommendation. 1.8V R2 50 Input LVHSTL Driver ICS HiPerClockS R1 50 LVHSTL 3.3V Zo = 50 Ohm Zo = 50 Ohm HiPerClockS CLK nCLK FIGURE 2E. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY 3.3V LVPECL DRIVER WITH AC COUPLE Zo = 50 Ohm R3 125 HiPerClockS CLK nCLK 3.3V R5 100 - 200 3.3V R2 84 3.3V R6 100 - 200 Input R5,R6 locate near the driver pin. Zo = 50 Ohm R1 84 R4 125 C2 LVPECL C1 Zo = 50 Ohm R1 100 3.3V LVDS_Driv er Zo = 50 Ohm Receiv er CLK nCLK 3.3V ICS83023I DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER TSD IDT™ / ICS™ DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER ICS83023I 8 |
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