PCA9673_1

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 01 — 1 February 2007

10 of 33

NXP Semiconductors

PCA9673

8.

I/O programming

8.1 Quasi-bidirectional I/O architecture

The PCA9673’s 16 ports (see Figure 2) are entirely independent and can be used either

as input or output ports. Input data is transferred from the ports to the microcontroller in

the Read mode (see Figure 17). Output data is transmitted to the ports in the Write mode

(see Figure 16).

Every data transmission from the PCA9673 must consist of an even number of bytes, the

first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third

will be referred to as P07 to P00, and so on.

This quasi-bidirectional I/O can be used as an input or output without the use of a control

signal for data directions. At power-on the I/Os are HIGH. In this mode only a current

edges into heavily loaded outputs. These devices turn on when an output is written HIGH,

and are switched off by the negative edge of SCL. The I/Os should be HIGH before being

used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as

inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the

write mode.

Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large

8.2 Writing to the port (Output mode)

To write, the master (microcontroller) first addresses the slave device. By setting the last

bit of the byte containing the slave address to logic 0 the Write mode is entered. The

PCA9673 acknowledges and the master sends the first data byte for P07 to P00. After the

If more than 2 bytes are read, the slave device loops back to the first byte (manufacturer byte)

and keeps sending data until the master generates a ‘no acknowledge’.

Fig 14. Device ID field reading

002aac334

1

1

1

1

0

0

0

A

S

1

device ID address

START condition

R/W

acknowledge from one

or several slave(s)

A5 A4 A3 A2 A1 A0 X

A6

A

1

1

1

1

0

0

1

1

device ID address

A

the device to be identified

don't care

acknowledge from

slave to be identified

acknowledge from

slave to be identified

R/W

M6 M5 M4

M7

M2 M1 M0

M3

A

acknowledge

from master

C5 C4 C3

C6

C1 C0 F5

C2

A

acknowledge

from master

manufacturer name

= 00000000

P3 P2 P1

F4

P0 R2 R1 R0

revision = 000

feature identification

= 000100

A

P

STOP

condition

no acknowledge

from master

category identification

= 0000001