SAM9X75 SiP

Data Sheet

© 2023 Microchip Technology Inc. and its subsidiaries

DS60001827B - 3

• Hardware Cryptography

– SHA (SHA1, SHA224, SHA256, SHA384, SHA512) and HMAC compliant with FIPS PUB 180

– AES: 256-, 192-, 128-bit key algorithms compliant with FIPS PUB 197

– AES/SHA tight coupling for IPsec hardware acceleration

– TDES: 2-key or 3-key algorithms compliant with FIPS PUB 46

– True random number generator compliant with NIST Special Publication 800-22 Test Suite and FIPS PUBs

140-2 and 140-3

– Key bus providing private key transfers between AES, TDES, TRNG, OTPC

– Physical Unclonable Function (PUF) including NIST SP 800-90B (DRNG) and embedding four Kbytes of

SRAM (PUFSRAM)

• I/O Ports

– Four 32-bit parallel input/output controllers

– Up to 106 programmable I/O lines multiplexed with up to four peripheral I/Os

– Input change interrupt capability on each I/O line, optional Schmitt trigger input

– Individually programmable open-drain, pull-up and pull-down resistors, synchronous output

– General-purpose analog and digital inputs tolerant to positive and negative current injection

• Package

– 16x16 mm2, 0.8-mm pitch, 243-ball BGA optimized for standard class PCB layout (down to four layers)

• Design for low ElectroMagnetic Interference (EMI)

– Slewrate-controlled I/Os

– DDR PHY with impedance-calibrated drivers

– Spread spectrum PLLs

– BGA power/ground ball assignment to provide optimum decoupling capacitors placement

• Operating Conditions

– Junction temperature (TJ) range: -40°C to +125°C

– Ambient temperature (TA) range: -40°C to +85°C