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ST72321 数据表(PDF) 14 Page - STMicroelectronics |
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ST72321 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 189 page  ST72321 14/189 Table 2. Hardware Register Map Address Block Register Label Register Name Reset Status Remarks 0000h 0001h 0002h Port A 2) PADR PADDR PAOR Port A Data Register Port A Data Direction Register Port A Option Register 00h1) 00h 00h R/W R/W R/W 0003h 0004h 0005h Port B 2) PBDR PBDDR PBOR Port B Data Register Port B Data Direction Register Port B Option Register 00h1) 00h 00h R/W R/W R/W 0006h 0007h 0008h Port C PCDR PCDDR PCOR Port C Data Register Port C Data Direction Register Port C Option Register 00h1) 00h 00h R/W R/W R/W 0009h 000Ah 000Bh Port D 2) PDDR PDDDR PDOR Port D Data Register Port D Data Direction Register Port D Option Register 00h1) 00h 00h R/W R/W R/W 000Ch 000Dh 000Eh Port E 2) PEDR PEDDR PEOR Port E Data Register Port E Data Direction Register Port E Option Register 00h1) 00h 00h R/W R/W2) R/W2) 000Fh 0010h 0011h Port F 2) PFDR PFDDR PFOR Port F Data Register Port F Data Direction Register Port F Option Register 00h1) 00h 00h R/W R/W R/W 0012h to 0017h Reserved Area (6 Bytes) 0018h 0019h 001Ah 001Bh 001Ch 001Dh 001Eh I2C I2CCR I2CSR1 I2CSR2 I2CCCR I2COAR1 I2COAR2 I2CDR I2C Control Register I2C Status Register 1 I2C Status Register 2 I2C Clock Control Register I2C Own Address Register 1 I2C Own Address Register2 I2C Data Register 00h 00h 00h 00h 00h 00h 00h R/W Read Only Read Only R/W R/W R/W R/W 001Fh 0020h Reserved Area (2 Bytes) 0021h 0022h 0023h SPI SPIDR SPICR SPICSR SPI Data I/O Register SPI Control Register SPI Control/Status Register xxh 0xh 00h R/W R/W R/W 0024h 0025h 0026h 0027h ITC ISPR0 ISPR1 ISPR2 ISPR3 Interrupt Software Priority Register 0 Interrupt Software Priority Register 1 Interrupt Software Priority Register 2 Interrupt Software Priority Register 3 FFh FFh FFh FFh R/W R/W R/W R/W 0028h EICR External Interrupt Control Register 00h R/W 0029h FLASH FCSR Flash Control/Status Register 00h R/W |
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